{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,2]],"date-time":"2026-04-02T15:56:03Z","timestamp":1775145363795,"version":"3.50.1"},"reference-count":40,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2019,2,1]],"date-time":"2019-02-01T00:00:00Z","timestamp":1548979200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,2,1]],"date-time":"2019-02-01T00:00:00Z","timestamp":1548979200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,2,1]],"date-time":"2019-02-01T00:00:00Z","timestamp":1548979200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["2810.002"],"award-info":[{"award-number":["2810.002"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100002418","name":"Intel Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100002418","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2019,2]]},"DOI":"10.1109\/jssc.2018.2875112","type":"journal-article","created":{"date-parts":[[2018,11,13]],"date-time":"2018-11-13T19:55:13Z","timestamp":1542138913000},"page":"569-583","source":"Crossref","is-referenced-by-count":60,"title":["Improved Power\/EM Side-Channel Attack Resistance of 128-Bit AES Engines With Random Fast Voltage Dithering"],"prefix":"10.1109","volume":"54","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5238-7196","authenticated-orcid":false,"given":"Arvind","family":"Singh","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9318-6793","authenticated-orcid":false,"given":"Monodeep","family":"Kar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1344-7533","authenticated-orcid":false,"given":"Sanu K.","family":"Mathew","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Anand","family":"Rajan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5207-1079","authenticated-orcid":false,"given":"Vivek","family":"De","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Saibal","family":"Mukhopadhyay","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2019411"},{"key":"ref38","article-title":"Energy efficient and side-channel secure cryptographic hardware for IoT-edge nodes","author":"singh","year":"0","journal-title":"IEEE Internet of Things Journal"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/1873548.1873552"},{"key":"ref32","article-title":"Correlation power analysis with a leakage model","volume":"3156","author":"brier","year":"2004","journal-title":"Cryptographic Hardware and Embedded Systems—CHES"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-48324-4_25"},{"key":"ref30","first-page":"115","article-title":"A testing methodology for side-channel resistance validation","author":"goodwill","year":"2011","journal-title":"NIST Non-invasive Attack Testing Workshop"},{"key":"ref37","article-title":"Higher-order threshold implementations","volume":"8874","author":"bilgin","year":"2014","journal-title":"Adv Cryptology"},{"key":"ref36","article-title":"Successfully attacking masked AES hardware implementations","volume":"3659","author":"mangard","year":"2005","journal-title":"Cryptographic Hardware and Embedded Systems—CHES"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2015.7231274"},{"key":"ref34","author":"kar","year":"2018","journal-title":"Blindsight Blinding EM Side-Channel Leakage using Built-In Fully Integrated Inductive Voltage Regulator"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2006.381778"},{"key":"ref40","article-title":"Improving side-channel analysis with optimal linear transforms","volume":"7771","author":"oswald","year":"2012","journal-title":"Smart Card Research and Advanced Applications"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2819499"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2015.7273503"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2016.7495573"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/s41635-017-0023-0"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2014.2315880"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.241"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/2934583.2934607"},{"key":"ref18","first-page":"401","article-title":"Exploiting on-chip power management for side-channel security","author":"singh","year":"2018","journal-title":"Proc Design Autom and Test in Euro Conf and Exhib (DATE'05)"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870301"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859886"},{"key":"ref4","article-title":"The EM side—Channel(s)","volume":"2523","author":"agrawal","year":"2002","journal-title":"Cryptographic Hardware and Embedded Systems—CHES"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2012.16"},{"key":"ref3","first-page":"388","article-title":"Differential power analysis","author":"kocher","year":"1999","journal-title":"Proc 19th Annu Int Cryptol Conf Adv Cryptol (CRYPTO)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5456932"},{"key":"ref29","year":"2018","journal-title":"EMC Probes"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681650"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488830"},{"key":"ref7","article-title":"Three-phase dual-rail pre-charge logic","volume":"4249","author":"bucci","year":"2006","journal-title":"Cryptographic Hardware and Embedded Systems—CHES"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.26"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2009.4977309"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2014.10"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2822691"},{"key":"ref22","first-page":"400","article-title":"A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A\/mm2","author":"sturcken","year":"2012","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2017.8094523"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2231033"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2693243"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2384039"},{"key":"ref25","first-page":"239","article-title":"A compact Rijndael hardware architecture with s-box optimization","volume":"2248","author":"satoh","year":"2001","journal-title":"Adv Cryptology"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8629373\/08533614.pdf?arnumber=8533614","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T21:11:28Z","timestamp":1657746688000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8533614\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,2]]},"references-count":40,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2018.2875112","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,2]]}}}