{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,28]],"date-time":"2026-03-28T17:53:26Z","timestamp":1774720406446,"version":"3.50.1"},"reference-count":32,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000185","name":"Defense Advanced Research Projects Agency","doi-asserted-by":"publisher","award":["HR0011-16-C-0052"],"award-info":[{"award-number":["HR0011-16-C-0052"]}],"id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["DGE-1106400"],"award-info":[{"award-number":["DGE-1106400"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Berkeley Wireless Research Center"},{"DOI":"10.13039\/100002418","name":"Intel Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100002418","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2019,7]]},"DOI":"10.1109\/jssc.2019.2913099","type":"journal-article","created":{"date-parts":[[2019,6,18]],"date-time":"2019-06-18T21:00:07Z","timestamp":1560891607000},"page":"1993-2008","source":"Crossref","is-referenced-by-count":10,"title":["A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET"],"prefix":"10.1109","volume":"54","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5767-301X","authenticated-orcid":false,"given":"Angie","family":"Wang","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9274-0182","authenticated-orcid":false,"given":"Woorham","family":"Bae","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2292-7670","authenticated-orcid":false,"given":"Jaeduk","family":"Han","sequence":"additional","affiliation":[]},{"given":"Stevo","family":"Bailey","sequence":"additional","affiliation":[]},{"given":"Orhan","family":"Ocal","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4900-6473","authenticated-orcid":false,"given":"Paul","family":"Rigge","sequence":"additional","affiliation":[]},{"given":"Zhongkai","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Kannan","family":"Ramchandran","sequence":"additional","affiliation":[]},{"given":"Elad","family":"Alon","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2324-1715","authenticated-orcid":false,"given":"Borivoje","family":"Nikolic","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2314448"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1962.1057683"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2017.2746568"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2017.2679053"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1002\/cpa.20124"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2005.862083"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2016.7472440"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/29.45547"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2015.7282735"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228584"},{"key":"ref17","doi-asserted-by":"crossref","DOI":"10.1145\/3195970.3195981","article-title":"ACED: A hardware library for generating DSP systems","author":"wang","year":"2018","journal-title":"Proc 55th Annu Design Autom Conf"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203780"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2018.8357061"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2018.8494317"},{"key":"ref4","first-page":"31","article-title":"A 100MHz–2GHz \n$12.5\\times$\n sub-Nyquist rate receiver in 90 nm CMOS","author":"yoo","year":"2012","journal-title":"Proc IEEE Radio Freq Integr Circuits Symp"},{"key":"ref27","first-page":"21","article-title":"An 8-bit, 16 input, 3.2 pJ\/op switched-capacitor dot product circuit in 28-nm FDSOI CMOS","author":"bankman","year":"2016","journal-title":"Proc IEEE Asian Solid-State Circuits Conf (A-SSCC)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSTSP.2010.2042414"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1137\/1.9781611973402.36"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2018.8494310"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757512"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2014.6927450"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1137\/1.9781611973099.93"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2006.871582"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2017.8052875"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/INFOCOM.2014.6848169"},{"key":"ref20","first-page":"1016","article-title":"A generator of memory-based, runtime-reconfigurable \n$2\\rm^{N} 3\\rm^{M} 5\\rm^{K}$\nFFT engines","author":"wang","year":"2016","journal-title":"Proc IEEE Int Conf Acoust Speech Signal Process (ICASSP)"},{"key":"ref22","first-page":"1","article-title":"A generated 7 GS\/s 8 b time-interleaved SAR ADC with 38.2 dB SNDR at Nyquist in 16 nm CMOS FinFET","author":"han","year":"2019","journal-title":"Proc IEEE CICC"},{"key":"ref21","article-title":"The rocket chip generator","author":"asanovi?","year":"2016"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/275107.275139"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2239005"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2018.8357062"},{"key":"ref25","first-page":"311","article-title":"Implementing the Rivest Shamir and Adleman public key encryption algorithm on a standard digital signal processor","author":"barrett","year":"1987","journal-title":"Adv Cryptology"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielaam\/4\/8746734\/8738896-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8746734\/08738896.pdf?arnumber=8738896","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:58:40Z","timestamp":1657745920000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8738896\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7]]},"references-count":32,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2019.2913099","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,7]]}}}