{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,8]],"date-time":"2026-05-08T16:06:10Z","timestamp":1778256370193,"version":"3.51.4"},"reference-count":30,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100004311","name":"Advanced Micro Devices","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100004311","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100008562","name":"University of Texas at Austin","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100008562","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2020,1]]},"DOI":"10.1109\/jssc.2019.2939888","type":"journal-article","created":{"date-parts":[[2019,10,14]],"date-time":"2019-10-14T23:27:41Z","timestamp":1571095661000},"page":"60-75","source":"Crossref","is-referenced-by-count":60,"title":["A 12.08-TOPS\/W All-Digital Time-Domain CNN Engine Using Bi-Directional Memory Delay Lines for Energy Efficient Edge Computing"],"prefix":"10.1109","volume":"55","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3078-9498","authenticated-orcid":false,"given":"Aseem","family":"Sayal","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S. S. Teja","family":"Nibhanupudi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shirin","family":"Fathima","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0258-6776","authenticated-orcid":false,"given":"Jaydeep P.","family":"Kulkarni","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref30","year":"2019","journal-title":"ModelSim Command Reference Manual Mentor Graphics"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TASSP.1983.1164196"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.1991.170429"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/CBS.2017.8266104"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TPAMI.2017.2703082"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7418008"},{"key":"ref15","first-page":"246","article-title":"Envision: A 0.26-to-10TOPS\/W subword-parallel dynamic-voltage-accuracy-frequency-scalable convolutional neural network processor in 28 nm FDSOI","author":"moons","year":"2017","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref16","first-page":"490","article-title":"A 42pJ\/decision 3.12TOPS\/W robust in-memory machine learning classifier with on-chip training","author":"gonugondla","year":"2018","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2642198"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310397"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2017.7993627"},{"key":"ref28","article-title":"TensorFlow: Large-scale machine learning on heterogeneous distributed systems","author":"abadi","year":"2016","journal-title":"arXiv 1603 04467"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2616357"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662510"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3065386"},{"key":"ref6","article-title":"Very deep convolutional networks for large-scale image recognition","author":"simonyan","year":"2014","journal-title":"arXiv 1409 1556v6"},{"key":"ref29","year":"2019","journal-title":"National Instruments and LabVIEW"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2636225"},{"key":"ref8","first-page":"10","article-title":"Computing’s energy problem (and what we can do about it)","author":"horowitz","year":"2014","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2017.643"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2014.220"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2012.2205597"},{"key":"ref20","first-page":"124","article-title":"A 55nm time-domain mixed-signal neuromorphic accelerator with stochastic synapses and embedded reinforcement learning for autonomous micro-robots","author":"amravati","year":"2018","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2451912"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2016.7844126"},{"key":"ref24","first-page":"3123","article-title":"BinaryConnect: Training deep neural networks with binary weights during propagations","author":"courbariaux","year":"2015","journal-title":"Proc Adv Neural Inf Process Syst (NIPS)"},{"key":"ref23","first-page":"525","article-title":"XNOR-Net: ImageNet classification using binary convolutional neural networks","author":"rastegari","year":"2016","journal-title":"Proc Eur Conf Comput Vis"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2297412"},{"key":"ref25","first-page":"4107","article-title":"Binarized neural networks","author":"hubara","year":"2016","journal-title":"Proc Adv Neural Inf Process Syst (NIPS)"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/8944135\/08867969.pdf?arnumber=8867969","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,27]],"date-time":"2022-04-27T13:36:32Z","timestamp":1651066592000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8867969\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,1]]},"references-count":30,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2019.2939888","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,1]]}}}