{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,28]],"date-time":"2026-08-28T16:45:17Z","timestamp":1787935517054,"version":"build-2784847793"},"reference-count":32,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,7,1]],"date-time":"2020-07-01T00:00:00Z","timestamp":1593561600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2020,7]]},"DOI":"10.1109\/jssc.2020.2987699","type":"journal-article","created":{"date-parts":[[2020,4,29]],"date-time":"2020-04-29T21:10:21Z","timestamp":1588194621000},"page":"1807-1818","source":"Crossref","is-referenced-by-count":43,"title":["A 4-GS\/s 39.9-dB SNDR 11.7-mW Hybrid Voltage-Time Two-Step ADC With Feedforward Ring Oscillator-Based TDCs"],"prefix":"10.1109","volume":"55","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8331-3202","authenticated-orcid":false,"given":"Yifan","family":"Lyu","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3689-6051","authenticated-orcid":false,"given":"Filip","family":"Tavernier","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870371"},{"key":"ref31","author":"murmann","year":"0","journal-title":"ADC Performance Survey 1997-2019"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757482"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2043382"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2558487"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2162186"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2017.8008510"},{"key":"ref14","first-page":"1","article-title":"A 5GS\/s 4-bit time-based single-channel CMOS ADC for radio astronomy","author":"macpherson","year":"2013","journal-title":"Proc IEEE Custom Integr Circuits Conf"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2393814"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2656864"},{"key":"ref17","first-page":"1","article-title":"A 75 dB DR 50 MHz BW 3rd order CT-modulator using VCO-based integrators","author":"young","year":"2014","journal-title":"Proc IEEE Symp VLSI Circuits Dig"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662412"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2018.8502316"},{"key":"ref28","first-page":"26","article-title":"A 6b 3GS\/s 11 mW fully dynamic flash ADC in 40nm CMOS with reduced number of comparators","author":"shu","year":"2012","journal-title":"Proc Symp VLSI Circuits (VLSIC)"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2319249"},{"key":"ref27","first-page":"5","article-title":"New encoding scheme for high-speed flash ADC’s","volume":"1","author":"kaess","year":"1997","journal-title":"Proc IEEE Int Symp Circuits Syst (ISCAS)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2291563"},{"key":"ref6","first-page":"466","article-title":"A 5.5 mW 6 b 5 GS\/S \n$4\\times$\n-interleaved 3 b\/cycle SAR ADC in 65 nm CMOS","author":"chan","year":"2015","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref29","first-page":"264","article-title":"An 8.5mW 5GS\/s 6b Flash ADC with Dynamic Offset Calibration in 32nm CMOS SOI","author":"chen","year":"2013","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"3049","DOI":"10.1109\/JSSC.2013.2279571","article-title":"A 3.1 mW 8b 1.2GS\/s single-channel asynchronous SAR ADC with alternate comparators for enhanced speed in 32nm digital SOI CMOS","author":"kull","year":"2013","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2747758"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2217873"},{"key":"ref2","first-page":"462","article-title":"A 10.3 GS\/s 6 b flash ADC for 10 G Ethernet applications","author":"verma","year":"2013","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2164961"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2364032"},{"key":"ref20","first-page":"1","article-title":"A 0.4 V 2.02 fJ\/conversion-step 10-bit hybrid SAR ADC with time-domain quantizer in 90 nm CMOS","author":"chen","year":"2014","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2019.8902671"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2293019"},{"key":"ref24","first-page":"112","article-title":"A -104 dBc\/Hz in-band phase noise 3 GHz all digital PLL with phase interpolation based hierarchical time to digital convertor","author":"miyashita","year":"2011","journal-title":"IEEE Symp VLSI Circuits Dig"},{"key":"ref23","first-page":"167","article-title":"A 36.4dB SNDR 5GHz 1.25GS\/s 7b 3.56 mW single-channel SAR ADC in 28nm bulk CMOS","author":"ramkaj","year":"2017","journal-title":"Proc IEEE Eur Solid-State Circuits Conf"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.829399"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2011.5937491"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/9127212\/09082177.pdf?arnumber=9082177","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,27]],"date-time":"2022-04-27T13:36:17Z","timestamp":1651066577000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9082177\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,7]]},"references-count":32,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2020.2987699","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,7]]}}}