{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,2]],"date-time":"2026-07-02T05:37:26Z","timestamp":1782970646465,"version":"3.54.5"},"reference-count":35,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"9","license":[{"start":{"date-parts":[[2020,9,1]],"date-time":"2020-09-01T00:00:00Z","timestamp":1598918400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,9,1]],"date-time":"2020-09-01T00:00:00Z","timestamp":1598918400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,9,1]],"date-time":"2020-09-01T00:00:00Z","timestamp":1598918400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100000266","name":"Engineering and Physical Sciences Research Council (EPSRC) under an iCASE award","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2020,9]]},"DOI":"10.1109\/jssc.2020.2989543","type":"journal-article","created":{"date-parts":[[2020,5,5]],"date-time":"2020-05-05T20:19:16Z","timestamp":1588709956000},"page":"2414-2428","source":"Crossref","is-referenced-by-count":4,"title":["A Spike-Latency Transceiver With Tunable Pulse Control for Low-Energy Wireless 3-D Integration"],"prefix":"10.1109","volume":"55","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4957-1934","authenticated-orcid":false,"given":"Benjamin J.","family":"Fletcher","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Shidhartha","family":"Das","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Terrence","family":"Mak","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373487"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373441"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2010.09.031"},{"key":"ref30","first-page":"131","article-title":"Interference from power\/signal lines and to SRAM circuits in 65 nm CMOS inductive-coupling link","author":"niitsu","year":"2007","journal-title":"Proc IEEE Asian Solid-State Circuits Conf"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1493970"},{"key":"ref34","article-title":"Wireless interconnect using inductive coupling in 3D-ICs","author":"han","year":"2012"},{"key":"ref10","first-page":"358","article-title":"A 0.14 pJ\/b inductive-coupling inter-chip data transceiver with digitally-controlled precise pulse shaping","author":"miura","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref11","first-page":"142","article-title":"A 1.2 Gb\/s\/pin wireless superconnect based on inductive inter-chip signaling (IIS)","author":"mizoguchi","year":"2004","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523175"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.845560"},{"key":"ref14","first-page":"216","article-title":"QUEST: A 7.49 TOPS multi-purpose log-quantized DNN inference engine stacked on 96 MB 3D SRAM using inductive-coupling technology in 40 nm CMOS","author":"ueyoshi","year":"2018","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MWSYM.2019.8701097"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2926143"},{"key":"ref17","year":"2019","journal-title":"AMS 0 35 $\\mu \\text m $ CMOS Technology (C35B4)"},{"key":"ref18","first-page":"1676","article-title":"A 1Tb\/s 3W inductive-coupling transceiver for inter-chip clock and data link","author":"miura","year":"2006","journal-title":"IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1587\/elex.14.20170874"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2007.913130"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2018.04.001"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2791498"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2014.6858425"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2909562"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2881075"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342200"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2013.6487725"},{"key":"ref7","first-page":"1","article-title":"Low-cost 3D chip stacking with ThruChip wireless connections","author":"ditzel","year":"2014","journal-title":"Proc IEEE Hot Chips Symp (HCS)"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2014.7021442"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1143\/JJAP.47.2797"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715201"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/INEC.2016.7589315"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2012365"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2019.00188"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2108127"},{"key":"ref23","first-page":"97","article-title":"A 65 fJ\/b inductive-coupling inter-chip transceiver using charge recycling technique for power-aware 3D system integration","author":"niitsu","year":"2008","journal-title":"Proc IEEE Asian Solid-State Circuits Conf"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2016.7538953"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2019.8824866"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/9177374\/09086615.pdf?arnumber=9086615","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,27]],"date-time":"2022-04-27T13:38:22Z","timestamp":1651066702000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9086615\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,9]]},"references-count":35,"journal-issue":{"issue":"9"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2020.2989543","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,9]]}}}