{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T16:13:27Z","timestamp":1780676007961,"version":"3.54.1"},"reference-count":24,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2021,6,1]],"date-time":"2021-06-01T00:00:00Z","timestamp":1622505600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,6,1]],"date-time":"2021-06-01T00:00:00Z","timestamp":1622505600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,6,1]],"date-time":"2021-06-01T00:00:00Z","timestamp":1622505600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"The Science and Technology Development Fund, Macau SAR","award":["0068\/2018\/A2"],"award-info":[{"award-number":["0068\/2018\/A2"]}]},{"name":"The Science and Technology Development Fund, Macau SAR","award":["SKL-AMSV (UM)-2020-2022"],"award-info":[{"award-number":["SKL-AMSV (UM)-2020-2022"]}]},{"DOI":"10.13039\/501100004733","name":"Research Grants of University of Macau","doi-asserted-by":"publisher","award":["MYRG2019-00049-AMSV"],"award-info":[{"award-number":["MYRG2019-00049-AMSV"]}],"id":[{"id":"10.13039\/501100004733","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2021,6]]},"DOI":"10.1109\/jssc.2020.3033931","type":"journal-article","created":{"date-parts":[[2020,11,9]],"date-time":"2020-11-09T21:31:50Z","timestamp":1604957510000},"page":"1772-1783","source":"Crossref","is-referenced-by-count":25,"title":["A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC"],"prefix":"10.1109","volume":"56","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8380-5944","authenticated-orcid":false,"given":"Yan","family":"Song","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8298-3244","authenticated-orcid":false,"given":"Yan","family":"Zhu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7635-1101","authenticated-orcid":false,"given":"Chi-Hang","family":"Chan","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2821-648X","authenticated-orcid":false,"given":"Rui P.","family":"Martins","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","first-page":"234c","article-title":"A 2.4-mW 25-MHz BW 300-MS\/s passive noise shaping SAR ADC with noise quantizer technique in 14-nm CMOS","author":"lin","year":"2016","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662299"},{"key":"ref12","first-page":"332","article-title":"A 50 MHz-bandwidth 70.4 dB-SNDR calibration-free time-interleaved 4th-order noise-shaping SAR ADC","author":"jie","year":"2019","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2944842"},{"key":"ref14","first-page":"236c","article-title":"A 13 b-ENOB 173 dB-FoM $2^{nd}$\n-order NS SAR ADC with passive integftors","author":"guo","year":"2017","journal-title":"Proc Symp VLSI Circuits"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870463"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2048498"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2871081"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2764742"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2012.6243804"},{"key":"ref4","first-page":"336","article-title":"A 76.6 dB-SNDR 50 MHz-BW 29.2 mW noise-coupling- assisted CT sturdy MASH $\\Delta\\Sigma$\n modulator with 1.5b\/4b quantizers in 28 nm CMOS","author":"qi","year":"2019","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref3","first-page":"334","article-title":"An $8\\times$\n-OSR 25 MHz-BW 79.4 dB\/74 dB DR\/SNDR CT $\\Delta\\Sigma$\n modulator using 7b linearized segmented DACs with digital noise-coupling-compensation filter in 7 nm FinFET CMOS","author":"lo","year":"2019","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref6","author":"murmann","year":"0","journal-title":"ADC performance survey 1997–2019"},{"key":"ref5","first-page":"230c","article-title":"A 3.2 mW SAR-assisted CT$\\Delta\\Sigma$\n ADC with 77.5 dB SNDR and 40 MHz BW in 28 nm CMOS","author":"cenci","year":"2019","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"ref8","first-page":"166","article-title":"Background multi-rate LMS calibration circuit for 15 MHz-BW 74 dB-DR CT 2-2 MASH $\\Delta\\Sigma$\n ADC in 28 nm CMOS","author":"fukazawa","year":"2020","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2018.8357095"},{"key":"ref2","first-page":"230","article-title":"A 50 MHz-BW continuous-time $\\Delta\\Sigma$\n ADC with dynamic error correction achieving 79.8 dB SNDR and 95.2 dB SFDR","author":"he","year":"2018","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2466475"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2217874"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870371"},{"key":"ref22","first-page":"276","article-title":"A 13b 4 GS\/s digitally assisted dynamic 3-stage asynchronous pipelined-SAR ADC","author":"vaz","year":"2017","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref21","first-page":"297","article-title":"A 172 dB-FoM pipelined SAR ADC using a regenerative amplifier with self-timed gain control and mixed-signal background calibration","author":"gandara","year":"2017","journal-title":"Proc A-SSCC"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2017.8008562"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2361774"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/9440831\/09252854.pdf?arnumber=9252854","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T14:54:52Z","timestamp":1652194492000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9252854\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,6]]},"references-count":24,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2020.3033931","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,6]]}}}