{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,31]],"date-time":"2026-03-31T14:07:51Z","timestamp":1774966071590,"version":"3.50.1"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2022,8,1]],"date-time":"2022-08-01T00:00:00Z","timestamp":1659312000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,8,1]],"date-time":"2022-08-01T00:00:00Z","timestamp":1659312000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,8,1]],"date-time":"2022-08-01T00:00:00Z","timestamp":1659312000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"ROHM Company Ltd"},{"DOI":"10.13039\/501100004721","name":"VLSI Design and Education Center (VDEC), The University of Tokyo, in collaboration with Cadence Design Systems, Inc., and Mentor Graphics, Inc","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100004721","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2022,8]]},"DOI":"10.1109\/jssc.2021.3137312","type":"journal-article","created":{"date-parts":[[2022,3,19]],"date-time":"2022-03-19T01:36:17Z","timestamp":1647653777000},"page":"2498-2508","source":"Crossref","is-referenced-by-count":34,"title":["A 0.186-pJ per Bit Latch-Based True Random Number Generator Featuring Mismatch Compensation and Random Noise Enhancement"],"prefix":"10.1109","volume":"57","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6807-0521","authenticated-orcid":false,"given":"Ruilin","family":"Zhang","sequence":"first","affiliation":[{"name":"Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1301-1297","authenticated-orcid":false,"given":"Xingyu","family":"Wang","sequence":"additional","affiliation":[{"name":"Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9328-7076","authenticated-orcid":false,"given":"Kunyang","family":"Liu","sequence":"additional","affiliation":[{"name":"Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5589-8397","authenticated-orcid":false,"given":"Hirofumi","family":"Shinohara","sequence":"additional","affiliation":[{"name":"Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696222"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2004.1332710"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523233"},{"key":"ref4","first-page":"216","article-title":"A true random number generator using time-dependent dielectric breakdown","volume-title":"IEEE Symp. VLSI Circuits Dig. Tech. Papers","author":"Liu"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/81.847868"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS48704.2020.9184449"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2003.1190581"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2519383"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9366019"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2694833"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2019.2896777"},{"key":"ref12","first-page":"595","article-title":"Design of an on-chip random number generator using metastability","volume-title":"Proc. IEEE ESSCIRC","author":"Kinniment"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.910965"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2217631"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2558490"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2886350"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1186\/s13635-016-0036-1"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.23919\/VLSICircuits52068.2021.9492474"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1587\/transele.2020CDP0006"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-DAT.2018.8373253"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3035207"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-DAT.2017.7939688"},{"key":"ref23","volume-title":"NIST SP 800-22: Download Documentation and Software","year":"2010"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.6028\/nist.sp.800-90b"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-04138-9_23"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/9837319\/09737551.pdf?arnumber=9737551","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,18]],"date-time":"2024-01-18T00:44:36Z","timestamp":1705538676000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9737551\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,8]]},"references-count":25,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2021.3137312","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,8]]}}}