{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,7]],"date-time":"2026-04-07T21:54:25Z","timestamp":1775598865562,"version":"3.50.1"},"reference-count":29,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2022,7,1]],"date-time":"2022-07-01T00:00:00Z","timestamp":1656633600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,7,1]],"date-time":"2022-07-01T00:00:00Z","timestamp":1656633600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,7,1]],"date-time":"2022-07-01T00:00:00Z","timestamp":1656633600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2022,7]]},"DOI":"10.1109\/jssc.2021.3139901","type":"journal-article","created":{"date-parts":[[2022,1,17]],"date-time":"2022-01-17T21:10:24Z","timestamp":1642453824000},"page":"2263-2273","source":"Crossref","is-referenced-by-count":33,"title":["CIM-Spin: A Scalable CMOS Annealing Processor With Digital In-Memory Spin Operators and Register Spins for Combinatorial Optimization Problems"],"prefix":"10.1109","volume":"57","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9696-3906","authenticated-orcid":false,"given":"Yuqi","family":"Su","sequence":"first","affiliation":[{"name":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9906-073X","authenticated-orcid":false,"given":"Hyunjoon","family":"Kim","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5397-9628","authenticated-orcid":false,"given":"Bongjin","family":"Kim","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of California, Santa Barbara, Santa Barbara, CA, USA"}]}],"member":"263","reference":[{"key":"ref1","article-title":"Exact combinatorial optimization with graph convolutional neural networks","author":"Gasse","year":"2019","journal-title":"arXiv:1906.01629"},{"key":"ref2","article-title":"Machine learning for combinatorial optimization: A methodological tour d\u2019Horizon","author":"Bengio","year":"2018","journal-title":"arXiv:1811.06128"},{"key":"ref3","article-title":"GPU based parallel ising computing for combinatorial optimization problems in VLSI physical design","author":"Cook","year":"2018","journal-title":"arXiv:1807.10750"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2017.6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.3389\/fphy.2014.00005"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2012.2190155"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1038\/nature13570"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1038\/nature10012"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19573.2019.8993460"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2016.7838539"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1126\/science.aah5178"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2498601"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2949230"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3027702"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3062821"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365748"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062938"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1073\/pnas.79.8.2554"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevLett.13.303"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1504\/IJCSE.2007.017827"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1287\/opre.36.3.493"},{"issue":"1","key":"ref22","first-page":"771","article-title":"Semi-supervised learning using greedy max-cut","volume":"14","author":"Wang","year":"2013","journal-title":"J. Mach. Learn. Res."},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1287\/opre.18.6.1225"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/227683.227684"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1007\/s11128-008-0082-9"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1007\/s11128-010-0200-3"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.15803\/ijnc.7.2_154"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/MCI.2006.329691"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-022-00774-2"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4\/9809766\/09683989.pdf?arnumber=9683989","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,13]],"date-time":"2024-01-13T22:06:48Z","timestamp":1705183608000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9683989\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,7]]},"references-count":29,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2021.3139901","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,7]]}}}