{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,2]],"date-time":"2025-12-02T18:59:04Z","timestamp":1764701944066,"version":"3.46.0"},"reference-count":28,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,8,1]],"date-time":"2025-08-01T00:00:00Z","timestamp":1754006400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100012247","name":"Program of Shanghai Academic\/Technology Research Leader","doi-asserted-by":"publisher","award":["23XD1402300"],"award-info":[{"award-number":["23XD1402300"]}],"id":[{"id":"10.13039\/501100012247","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100015668","name":"Project of Ministry of Education of China (MOE) Innovation Platform","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100015668","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2025,8]]},"DOI":"10.1109\/jssc.2024.3515198","type":"journal-article","created":{"date-parts":[[2024,12,24]],"date-time":"2024-12-24T14:19:00Z","timestamp":1735049940000},"page":"2765-2781","source":"Crossref","is-referenced-by-count":2,"title":["A 5\u201318-GHz Reconfigurable Quadrature Receiver With Enhanced I\u2013Q Isolation and 100\u2013500-MHz Baseband Bandwidth"],"prefix":"10.1109","volume":"60","author":[{"ORCID":"https:\/\/orcid.org\/0009-0005-3285-8188","authenticated-orcid":false,"given":"Junyan","family":"Bi","sequence":"first","affiliation":[{"name":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0044-1231","authenticated-orcid":false,"given":"Hao","family":"Xu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-7182-1219","authenticated-orcid":false,"given":"Tenghao","family":"Zou","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"}]},{"given":"Yaxin","family":"Zeng","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0002-1140-5823","authenticated-orcid":false,"given":"Yechen","family":"Tian","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-8335-3536","authenticated-orcid":false,"given":"Weitao","family":"He","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"}]},{"given":"Junjie","family":"Gu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"}]},{"given":"Ziyang","family":"Jiao","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9942-0069","authenticated-orcid":false,"given":"Shubin","family":"Liu","sequence":"additional","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi’an, Shaanxi, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7764-1928","authenticated-orcid":false,"given":"Zhangming","family":"Zhu","sequence":"additional","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Integrated Circuits, Xidian University, Xi’an, Shaanxi, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7012-404X","authenticated-orcid":false,"given":"Na","family":"Yan","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chip and Systems, Institute of Microelectronics, Fudan University, Shanghai, China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.894307"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42614.2022.9731638"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42615.2023.10067266"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2417808"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3209614"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2019.8662417"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3146080"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/isscc49657.2024.10454493"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/LMWC.2017.2711524"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2021.3074160"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC.2018.8429020"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/rfic49505.2020.9218439"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.3047726"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/rfic54546.2022.9862955"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2023.3267791"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2799983"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2032585"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2144110"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2024.3379892"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2821139"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/isscc19947.2020.9063006"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2987715"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC.2019.8701843"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/RFIT.2017.8048284"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2925743"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.3020851"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/MMW.2006.1634022"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42613.2021.9365800"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/4\/11095840\/10813346.pdf?arnumber=10813346","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,12,2]],"date-time":"2025-12-02T18:48:27Z","timestamp":1764701307000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10813346\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,8]]},"references-count":28,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2024.3515198","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"type":"print","value":"0018-9200"},{"type":"electronic","value":"1558-173X"}],"subject":[],"published":{"date-parts":[[2025,8]]}}}