{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,17]],"date-time":"2026-07-17T04:08:44Z","timestamp":1784261324426,"version":"3.55.0"},"reference-count":36,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T00:00:00Z","timestamp":1751328000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T00:00:00Z","timestamp":1751328000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T00:00:00Z","timestamp":1751328000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["92373119"],"award-info":[{"award-number":["92373119"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"Optoelectronic and Microelectronic Devices and Integration in the National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2021YFB2206602"],"award-info":[{"award-number":["2021YFB2206602"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"Optoelectronic and Microelectronic Devices and Integration in the National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2018YFB2202302"],"award-info":[{"award-number":["2018YFB2202302"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2025,7]]},"DOI":"10.1109\/jssc.2025.3555383","type":"journal-article","created":{"date-parts":[[2025,4,8]],"date-time":"2025-04-08T13:52:15Z","timestamp":1744120335000},"page":"2305-2318","source":"Crossref","is-referenced-by-count":3,"title":["A 112-Gb\/s PAM-4 Retimer Transceiver With Jitter-Filtering Clocking Scheme and BER Optimization Technique in 28-nm CMOS"],"prefix":"10.1109","volume":"60","author":[{"ORCID":"https:\/\/orcid.org\/0009-0005-9624-6375","authenticated-orcid":false,"given":"Hua","family":"Xu","sequence":"first","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0003-5681-0010","authenticated-orcid":false,"given":"Mingche","family":"Lai","sequence":"additional","affiliation":[{"name":"College of Computer, National University of Defense Technology, Changsha, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8978-6825","authenticated-orcid":false,"given":"Xuqiang","family":"Zheng","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4999-5884","authenticated-orcid":false,"given":"Zedong","family":"Wang","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jiang","family":"Xu","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0002-9354-3401","authenticated-orcid":false,"given":"Sai","family":"Li","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Fangxu","family":"Lv","sequence":"additional","affiliation":[{"name":"College of Computer, National University of Defense Technology, Changsha, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Min","family":"Liu","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Weijie","family":"Li","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zhanhao","family":"Wen","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8052-6165","authenticated-orcid":false,"given":"Xuan","family":"Guo","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6592-7515","authenticated-orcid":false,"given":"Xinhua","family":"Wang","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7630-0021","authenticated-orcid":false,"given":"Zhi","family":"Jin","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0854-8559","authenticated-orcid":false,"given":"Xinyu","family":"Liu","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/isscc49657.2024.10454537"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454418"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3223052"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.23919\/vlsitechnologyandcir57934.2023.10185378"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.23919\/VLSITechnologyandCir57934.2023.10185362"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3024261"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS48785.2022.9937895"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2024.3387355"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3108969"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3309665"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/HOTI52880.2021.00019"},{"key":"ref12","first-page":"1","article-title":"A 50Gb\/s PAM-4 retimer-CDR + VCSEL driver with asymmetric pulsed pre-emphasis integrated into a single CMOS die","volume-title":"Proc. Opt. Fiber Commun. Conf. Exhib. (OFC)","author":"Hu"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ESSERC62670.2024.10719483"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9366063"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454275"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42613.2021.9365929"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42614.2022.9731688"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2632300"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2374176"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2746672"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2018.2858810"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2949173"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2019.8662479"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.903076"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2875091"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433970"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3057372"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/CICC60959.2024.10529037"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2466475"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2024.3450695"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnologyandCir46769.2022.9830304"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2019.8778051"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662421"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2878850"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42613.2021.9366030"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42615.2023.10067613"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/4\/11071629\/10955714.pdf?arnumber=10955714","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,12,2]],"date-time":"2025-12-02T18:48:24Z","timestamp":1764701304000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10955714\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,7]]},"references-count":36,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2025.3555383","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,7]]}}}