{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,28]],"date-time":"2026-03-28T17:52:37Z","timestamp":1774720357412,"version":"3.50.1"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2026,2,1]],"date-time":"2026-02-01T00:00:00Z","timestamp":1769904000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,2,1]],"date-time":"2026-02-01T00:00:00Z","timestamp":1769904000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,2,1]],"date-time":"2026-02-01T00:00:00Z","timestamp":1769904000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Engineering and Physical Sciences Research Council (EPSRC) Functional Oxide Reconfigurable Technologies (FORTE) Programme","award":["EP\/R024642\/1,2"],"award-info":[{"award-number":["EP\/R024642\/1,2"]}]},{"name":"Royal Academy of Engineering Chair in Emerging Technologies","award":["CiET1819\/2\/93"],"award-info":[{"award-number":["CiET1819\/2\/93"]}]},{"DOI":"10.13039\/501100000288","name":"Royal Society","doi-asserted-by":"publisher","award":["IEC\/NSFC\/22306"],"award-info":[{"award-number":["IEC\/NSFC\/22306"]}],"id":[{"id":"10.13039\/501100000288","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2026,2]]},"DOI":"10.1109\/jssc.2025.3571637","type":"journal-article","created":{"date-parts":[[2025,6,4]],"date-time":"2025-06-04T13:56:47Z","timestamp":1749045407000},"page":"589-602","source":"Crossref","is-referenced-by-count":2,"title":["A Bi-Directional Neural Interface Chip With 32-Channel 83-dB DR CTDSM-Based Recording Using FIRDAC With Pre-Emptive ELD Compensation"],"prefix":"10.1109","volume":"61","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-8736-2914","authenticated-orcid":false,"given":"Xiongfei","family":"Jiang","sequence":"first","affiliation":[{"name":"Centre for Electronics Frontiers, School of Engineering, Institute for Integrated Micro and Nano Systems, The University of Edinburgh, Edinburgh, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0009-0005-0691-3905","authenticated-orcid":false,"given":"Yuntao","family":"Han","sequence":"additional","affiliation":[{"name":"Centre for Electronics Frontiers, School of Engineering, Institute for Integrated Micro and Nano Systems, The University of Edinburgh, Edinburgh, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-0913-0999","authenticated-orcid":false,"given":"Grahame","family":"Reynolds","sequence":"additional","affiliation":[{"name":"Centre for Electronics Frontiers, School of Engineering, Institute for Integrated Micro and Nano Systems, The University of Edinburgh, Edinburgh, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2966-6183","authenticated-orcid":false,"given":"Zhaoguang","family":"Si","sequence":"additional","affiliation":[{"name":"Department of Electrical and Electronic Engineering, Imperial College London, London, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3494-4029","authenticated-orcid":false,"given":"Alfredo Gonzalez","family":"Sulser","sequence":"additional","affiliation":[{"name":"Centre for Discovery Brain Sciences, The University of Edinburgh, Edinburgh, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6267-6909","authenticated-orcid":false,"given":"Themis","family":"Prodromakis","sequence":"additional","affiliation":[{"name":"Centre for Electronics Frontiers, School of Engineering, Institute for Integrated Micro and Nano Systems, The University of Edinburgh, Edinburgh, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5450-2108","authenticated-orcid":false,"given":"Shiwei","family":"Wang","sequence":"additional","affiliation":[{"name":"Centre for Electronics Frontiers, School of Engineering, Institute for Integrated Micro and Nano Systems, The University of Edinburgh, Edinburgh, U.K."}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.conb.2018.01.012"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3204508"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TBME.2013.2244890"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1038\/nature24636"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1126\/science.abf4588"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnologyandCir46783.2024.10631430"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnologyandCir46783.2024.10631524"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3201704"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1038\/s44222-024-00185-2"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-024-50597-2"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.3389\/fneng.2010.00003"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2008.922581"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2749426"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2017.8008543"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2332885"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42614.2022.9731114"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/vlsitechnologyandcir46783.2024.10631536"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2717937"},{"key":"ref19","volume-title":"Understanding Delta-sigma Data Converters","author":"Schreier","year":"2005"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2290846"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/31.52724"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1049\/el.2017.4032"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42615.2023.10067844"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454382"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3018478"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2015.2487270"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/4.654932"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/OJSSCS.2021.3113887"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42613.2021.9366002"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523148"},{"key":"ref31","article-title":"Dataset of bci2000-compatible intraoperative ecog with neuromorphic encoding","author":"Costa","year":"2024"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3056040"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2506651"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49661.2025.10904745"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/4\/11368630\/11023219.pdf?arnumber=11023219","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,30]],"date-time":"2026-01-30T21:03:18Z","timestamp":1769806998000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11023219\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,2]]},"references-count":34,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2025.3571637","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,2]]}}}