{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,28]],"date-time":"2026-03-28T06:53:27Z","timestamp":1774680807495,"version":"3.50.1"},"reference-count":30,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T00:00:00Z","timestamp":1775001600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T00:00:00Z","timestamp":1775001600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T00:00:00Z","timestamp":1775001600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"ItoM (Semiconductor Ideas to the Market) and Holland High Tech in a Public-Private-Cooperation for Research and Development in the High Tech Systems and Materials Top Sector"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2026,4]]},"DOI":"10.1109\/jssc.2025.3591756","type":"journal-article","created":{"date-parts":[[2025,7,31]],"date-time":"2025-07-31T18:31:36Z","timestamp":1753986696000},"page":"1629-1642","source":"Crossref","is-referenced-by-count":0,"title":["A Programmable Resolution Digital-to-Frequency or Period Converter With Sawtooth-Based Jitter Reduction"],"prefix":"10.1109","volume":"61","author":[{"ORCID":"https:\/\/orcid.org\/0009-0009-7367-1781","authenticated-orcid":false,"given":"Nimit","family":"Jain","sequence":"first","affiliation":[{"name":"IC-Design Group, Faculty of Electrical Engineering, Mathematics and Computer Science, University of Twente, Enschede, AE, The Netherlands"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2487-8996","authenticated-orcid":false,"given":"Eric A. M.","family":"Klumperink","sequence":"additional","affiliation":[{"name":"IC-Design Group, Faculty of Electrical Engineering, Mathematics and Computer Science, University of Twente, Enschede, AE, The Netherlands"}]},{"given":"Harm","family":"van Rumpt","sequence":"additional","affiliation":[{"name":"University of Twente, s-Hertogenbosch, The Netherlands"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6790-5873","authenticated-orcid":false,"given":"Bram","family":"Nauta","sequence":"additional","affiliation":[{"name":"IC-Design Group, Faculty of Electrical Engineering, Mathematics and Computer Science, University of Twente, Enschede, AE, The Netherlands"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2007.906943"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2817602"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3276262"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2423977"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2223931"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/RFIC.2016.7508268"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067785"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2024.3396799"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2024.3399733"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2191875"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067511"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2915548"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/4.568849"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/vlsic.1997.623814"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/22.739202"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/22.846716"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/4.938379"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/RWS55624.2023.10046322"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/IMS40175.2024.10600259"},{"key":"ref20","volume-title":"Digital Frequency Synthesis Demystified","author":"Goldberg","year":"1999"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/RWS.2010.5434125"},{"key":"ref22","volume-title":"I2C-Programmable Any-Frequency, Any-Output Quad Clock Generator","year":"2021"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/4.910498"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2024.3464236"},{"key":"ref25","volume-title":"Jitter reduction circuit and frequency synthesizer","author":"Philippe","year":"2010"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.876206"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2878836"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2015.2414421"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2025.3561203"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1049\/el.2016.4577"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/4\/11457062\/11106422.pdf?arnumber=11106422","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,28]],"date-time":"2026-03-28T05:30:49Z","timestamp":1774675849000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11106422\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,4]]},"references-count":30,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2025.3591756","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,4]]}}}