{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,27]],"date-time":"2026-04-27T20:39:31Z","timestamp":1777322371706,"version":"3.51.4"},"reference-count":24,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,5,1]],"date-time":"2026-05-01T00:00:00Z","timestamp":1777593600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"National Key Research and Development Program of China","award":["2023YFB4405002"],"award-info":[{"award-number":["2023YFB4405002"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62574155"],"award-info":[{"award-number":["62574155"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62361166671"],"award-info":[{"award-number":["62361166671"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2026,5]]},"DOI":"10.1109\/jssc.2025.3608849","type":"journal-article","created":{"date-parts":[[2025,9,25]],"date-time":"2025-09-25T17:55:20Z","timestamp":1758822920000},"page":"2129-2140","source":"Crossref","is-referenced-by-count":0,"title":["A Single-Channel 1\u20133 MASH SAR-Assisted Pipeline ADC With Residue Amplifier Error Shaping"],"prefix":"10.1109","volume":"61","author":[{"ORCID":"https:\/\/orcid.org\/0009-0006-0861-8181","authenticated-orcid":false,"given":"Yanbo","family":"Zhang","sequence":"first","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guolong","family":"Fu","sequence":"additional","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Junyan","family":"Hao","sequence":"additional","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9942-0069","authenticated-orcid":false,"given":"Shubin","family":"Liu","sequence":"additional","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7764-1928","authenticated-orcid":false,"given":"Zhangming","family":"Zhu","sequence":"additional","affiliation":[{"name":"Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits, Xidian University, Xi&#x2019;an, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9610-0641","authenticated-orcid":false,"given":"Yan","family":"Zhu","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2821-648X","authenticated-orcid":false,"given":"Rui P.","family":"Martins","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7635-1101","authenticated-orcid":false,"given":"Chi-Hang","family":"Chan","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Faculty of Science and Technology, State Key Laboratory of Analog and Mixed Signal VLSI, Institute of Microelectronics, University of Macau, Macau, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662416"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2387849"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2900150"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662299"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2938626"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365754"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3072034"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3033931"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3137342"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067689"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3086853"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3111912"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.2002547"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2871081"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.892169"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757397"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/CICC57935.2023.10121262"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2362851"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2017.8008491"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/tcsii.2013.2268413"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3222162"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2017.7993659"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2978384"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454431"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/4\/11494345\/11179854.pdf?arnumber=11179854","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,4,27]],"date-time":"2026-04-27T19:49:33Z","timestamp":1777319373000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11179854\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,5]]},"references-count":24,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2025.3608849","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,5]]}}}