{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T12:46:49Z","timestamp":1780663609254,"version":"3.54.1"},"reference-count":31,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100004358","name":"Samsung","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100004358","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2026,1]]},"DOI":"10.1109\/jssc.2025.3618903","type":"journal-article","created":{"date-parts":[[2025,10,23]],"date-time":"2025-10-23T17:51:51Z","timestamp":1761241911000},"page":"267-280","source":"Crossref","is-referenced-by-count":2,"title":["A 42-Gb\/s Noise-Tolerant Single-Ended Clock-Referenced PAM3 Transceiver for Chiplet Interfaces"],"prefix":"10.1109","volume":"61","author":[{"ORCID":"https:\/\/orcid.org\/0009-0003-1431-1109","authenticated-orcid":false,"given":"Kahyun","family":"Kim","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9712-2044","authenticated-orcid":false,"given":"Daehoon","family":"Na","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-6725-2698","authenticated-orcid":false,"given":"Jeongeun","family":"Song","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0000-1883-3826","authenticated-orcid":false,"given":"Hajung","family":"Park","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-3194-400X","authenticated-orcid":false,"given":"Jin-Seok","family":"Heo","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0004-9456-6132","authenticated-orcid":false,"given":"Hyunjun","family":"Park","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0005-1270-8051","authenticated-orcid":false,"given":"Jihee","family":"Kim","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-4260-0556","authenticated-orcid":false,"given":"Hanseok","family":"Kim","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-2183-451X","authenticated-orcid":false,"given":"Hyeri","family":"Roh","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9392-3730","authenticated-orcid":false,"given":"Jung-Hun","family":"Park","sequence":"additional","affiliation":[{"name":"Cadence Design Systems Inc., San Jose, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3556-8689","authenticated-orcid":false,"given":"Woo-Seok","family":"Choi","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering and the Inter University Semiconductor Research Center, Seoul National University, Seoul, South Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","volume-title":"Universal Chiplet Interconnect Express (UCIe) Specification, Revision 1.1","author":"Consortium","year":"2023"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9063103"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/HCS61935.2024.10665220"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2783679"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/tcsi.2025.3573564"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/isscc19947.2020.9063162"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2019.2910616"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2962655"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2013.6487789"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9063140"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3170887"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS46773.2023.10182132"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/isscc49661.2025.10904551"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/isscc49661.2025.10904729"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3338478"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2786716"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/OJSSCS.2024.3503546"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731763"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.2987712"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42615.2023.10067738"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42615.2023.10067552"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.857370"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2009.4977326"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/isscc19947.2020.9063096"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2161394"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3250706"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3232024"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/isscc49657.2024.10454481"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731740"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2025.3545483"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/isscc49661.2025.10904631"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/4\/11318064\/11215671.pdf?arnumber=11215671","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,12,30]],"date-time":"2025-12-30T18:37:58Z","timestamp":1767119878000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11215671\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,1]]},"references-count":31,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2025.3618903","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,1]]}}}