{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,9]],"date-time":"2026-05-09T22:17:16Z","timestamp":1778365036580,"version":"3.51.4"},"reference-count":31,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62488101"],"award-info":[{"award-number":["62488101"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"State Key Laboratory of Integrated Chips and Systems"},{"DOI":"10.13039\/501100001809","name":"State Key Laboratory of Integrated Chips and Systems, and in part by the Peng Cheng Laboratory and China Mobile (PCL-CMCC) Foundation for Science and Innovation","doi-asserted-by":"publisher","award":["2024ZY2B0070"],"award-info":[{"award-number":["2024ZY2B0070"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Solid-State Circuits"],"published-print":{"date-parts":[[2026,1]]},"DOI":"10.1109\/jssc.2025.3623630","type":"journal-article","created":{"date-parts":[[2025,11,4]],"date-time":"2025-11-04T18:36:17Z","timestamp":1762281377000},"page":"90-102","source":"Crossref","is-referenced-by-count":1,"title":["SHINSAI: A 586 mm\n                    <sup>2<\/sup>\n                    Reusable Active TSV Interposer With Programmable Interconnect Fabric and 512 Mb Underdeck Memory"],"prefix":"10.1109","volume":"61","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6412-3996","authenticated-orcid":false,"given":"Haozhe","family":"Zhu","sequence":"first","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bo","family":"Jiao","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-5290-7670","authenticated-orcid":false,"given":"Yuman","family":"Zeng","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yongjiang","family":"Li","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jie","family":"Liao","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Siyao","family":"Jia","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zexing","family":"Chen","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Liyu","family":"Lin","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-6355-2439","authenticated-orcid":false,"given":"Xuanda","family":"Lin","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Suchang","family":"Huang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mochen","family":"Tian","sequence":"additional","affiliation":[{"name":"Kiwimoore Semiconductors Company Ltd., Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jundong","family":"Zhu","sequence":"additional","affiliation":[{"name":"Kiwimoore Semiconductors Company Ltd., Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dexin","family":"Wen","sequence":"additional","affiliation":[{"name":"Kiwimoore Semiconductors Company Ltd., Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yan","family":"Wang","sequence":"additional","affiliation":[{"name":"Kiwimoore Semiconductors Company Ltd., Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu","family":"Wang","sequence":"additional","affiliation":[{"name":"Kiwimoore Semiconductors Company Ltd., Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jian","family":"Xu","sequence":"additional","affiliation":[{"name":"Kiwimoore Semiconductors Company Ltd., Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Feng","family":"Wang","sequence":"additional","affiliation":[{"name":"Kiwimoore Semiconductors Company Ltd., Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8742-687X","authenticated-orcid":false,"given":"Jun","family":"Tao","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5980-4236","authenticated-orcid":false,"given":"Chixiao","family":"Chen","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7062-831X","authenticated-orcid":false,"given":"Qi","family":"Liu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ming","family":"Liu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/HCS55958.2022.9895592"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3579371.3589350"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7062847"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HCS55958.2022.9895477"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454441"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/HCS61935.2024.10665178"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/HCS55958.2022.9895631"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/HCS61935.2024.10665247"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/HCS61935.2024.10664717"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067540"},{"key":"ref11","first-page":"1","article-title":"Tsmc packaging technologies for chiplets and 3D","volume-title":"Proc. IEEE Hot Chips 33 Symp. (HCS)","author":"Yu"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2016.201"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC32696.2021.00166"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC51909.2023.00174"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9063103"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49661.2025.10904529"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/vlsi-tsa.2014.6839701"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC32696.2021.00125"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-7276-7_10"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2019.00094"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/isscc19947.2020.9062957"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2980095"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.4071\/2380-4505-2019.1.000027"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3036341"},{"key":"ref25","first-page":"1","article-title":"GIA: A reusable general interposer architecture for agile chiplet integration","volume-title":"Proc. IEEE\/ACM Int. Conf. Comput. Aided Design (ICCAD)","author":"Li"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731565"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731694"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2024.3419579"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/75104.75105"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731657"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42614.2022.9731582"}],"container-title":["IEEE Journal of Solid-State Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/4\/11318064\/11224926.pdf?arnumber=11224926","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,12,30]],"date-time":"2025-12-30T18:38:01Z","timestamp":1767119881000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11224926\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,1]]},"references-count":31,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jssc.2025.3623630","relation":{},"ISSN":["0018-9200","1558-173X"],"issn-type":[{"value":"0018-9200","type":"print"},{"value":"1558-173X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,1]]}}}