{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T09:30:07Z","timestamp":1730280607709,"version":"3.28.0"},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,2]]},"DOI":"10.1109\/lascas.2014.6820297","type":"proceedings-article","created":{"date-parts":[[2014,5,30]],"date-time":"2014-05-30T18:59:56Z","timestamp":1401476396000},"page":"1-4","source":"Crossref","is-referenced-by-count":3,"title":["Behavioral modelling of a 4&lt;sup&gt;th&lt;\/sup&gt; order LP &amp;#x03A3;&amp;#x0394; modulator-towards the design of a hybrid proposal"],"prefix":"10.1109","author":[{"given":"J. G.","family":"Garcia-Sanchez","sequence":"first","affiliation":[]},{"given":"D.","family":"Calderon-Preciado","sequence":"additional","affiliation":[]},{"given":"F.","family":"Sandoval-Ibarra","sequence":"additional","affiliation":[]},{"given":"Jose M.","family":"de la Rosa","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","first-page":"1","article-title":"Effect of the integrator settling behavior on SC ?? modulators characteristics: A theoretical study","author":"publiese","year":"2008","journal-title":"IEEE Int Conf Signals Circuits & Systems"},{"journal-title":"Analog Integrated Circuit Design","year":"2005","author":"carusone","key":"17"},{"journal-title":"Convertidores A\/D ?? de Altas Prestaciones en Tecnologi?as CMOS Submicrome?tricas","year":"2004","author":"del rio","key":"18"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2002.1010430"},{"key":"16","article-title":"Continuous-Time sigma-delta A\/D conversion: Fundamentals","author":"ortmanns","year":"2006","journal-title":"Performance Limits and Robust Implementations"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2041814"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2163892"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2005.852479"},{"key":"12","first-page":"25","article-title":"High-level design of a hybrid cascade modulator for UMTS\/gsm\/bluetooth\/ WLAN applications","author":"luis","year":"2011","journal-title":"Proc of 1st Workshop on Analog and Digital Electronic Design WADED"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1997.608678"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917499"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/19.982965"},{"key":"2","first-page":"106","article-title":"VHDL-ams behavioral modelling and simulation of high-pass delta-sigma modulator","author":"nguyen","year":"2005","journal-title":"Proc IEEE Int Behavioral Model Simulation Workshop"},{"key":"1","first-page":"319","article-title":"Top-down analog design methodology using matlab ans simulink","volume":"5","author":"chandra","year":"2001","journal-title":"Proc of the IEEE Int Symposium on Circuits and Systems"},{"key":"10","first-page":"244","article-title":"A 5th-order CT\/DT multi-mode - Modulator","author":"putter","year":"2007","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"7","first-page":"1224","article-title":"Design of hybrid continuous-Time discrete-Time delta-sigma modulators","author":"kwan","year":"2008","journal-title":"Proc of the IEEE Int Symposium on Circuits and Systems"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.845558"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.819165"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.894820"},{"key":"9","first-page":"176","article-title":"A 106db snr hybrid oversampling ADC for digital audio","author":"nguyen","year":"2005","journal-title":"Proc of the IEEE Int Solid-State Conf"},{"key":"8","first-page":"178","article-title":"A 0.18-m 102db-snr mixed ct sc audio-band - ADC","author":"morrow","year":"2005","journal-title":"Proc IEEE Int Solid-State Circuits Conf"}],"event":{"name":"2014 IEEE 5th Latin American Symposium on Circuits and Systems (LASCAS)","start":{"date-parts":[[2014,2,25]]},"location":"Santiago, Chile","end":{"date-parts":[[2014,2,28]]}},"container-title":["2014 IEEE 5th Latin American Symposium on Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6815880\/6820243\/06820297.pdf?arnumber=6820297","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T19:31:46Z","timestamp":1490297506000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6820297\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,2]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/lascas.2014.6820297","relation":{},"subject":[],"published":{"date-parts":[[2014,2]]}}}