{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T06:40:53Z","timestamp":1729665653491,"version":"3.28.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,2]]},"DOI":"10.1109\/lascas.2016.7451045","type":"proceedings-article","created":{"date-parts":[[2016,4,14]],"date-time":"2016-04-14T20:19:48Z","timestamp":1460665188000},"page":"203-206","source":"Crossref","is-referenced-by-count":10,"title":["MOS-only circuit design automation"],"prefix":"10.1109","author":[{"given":"Deniz","family":"Ozenli","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"H. Hakan","family":"Kuntman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2003.810742"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2003.1253616"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2001.968600"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2011.5770815"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1973009.1973096"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"105","DOI":"10.1007\/s10470-012-9930-8","article-title":"MOS-only second order current-mode LP\/BP filter","volume":"74","author":"emre","year":"2013","journal-title":"Analog Integrated Circuits and Signal Processing"},{"key":"ref4","first-page":"139","article-title":"DARWIN: CMOS opamp synthesis by means of a genetic algorithm","author":"antao","year":"1995","journal-title":"Proc of Design Automation Conf"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2012.99"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/s11081-008-9045-3"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364569"},{"key":"ref8","first-page":"294","article-title":"An Improvised MOS Transistor Model Suitable for Geometric Program Based Analog Circuit Sizing in Submicron Technology","author":"dasgupta","year":"2010","journal-title":"Proc VLSI"},{"key":"ref7","first-page":"863","article-title":"Techniques for improving the accuracy of geometric-programming based analog circuit design optimization","author":"kim","year":"2004","journal-title":"Proc of ICCAD"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/43.905671"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/43.905672"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2012.6187550"}],"event":{"name":"2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS)","start":{"date-parts":[[2016,2,28]]},"location":"Florianopolis","end":{"date-parts":[[2016,3,2]]}},"container-title":["2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7447194\/7450986\/07451045.pdf?arnumber=7451045","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,24]],"date-time":"2017-06-24T11:00:49Z","timestamp":1498302049000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7451045\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,2]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/lascas.2016.7451045","relation":{},"subject":[],"published":{"date-parts":[[2016,2]]}}}