{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,28]],"date-time":"2025-10-28T15:00:59Z","timestamp":1761663659659,"version":"3.28.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,2]]},"DOI":"10.1109\/lascas.2017.7948101","type":"proceedings-article","created":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T21:26:29Z","timestamp":1497993989000},"page":"1-4","source":"Crossref","is-referenced-by-count":6,"title":["Exploiting addition schemes for the improvement of optimized radix-2 and radix-4 fft butterflies"],"prefix":"10.1109","author":[{"given":"Renato H.","family":"Neuenfeld","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mateus B.","family":"Fonseca","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Eduardo A. C.","family":"da Costa","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jean P.","family":"Oses","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/LASCAS.2013.6519053"},{"key":"ref11","first-page":"307","article-title":"Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths","author":"costa","year":"2003","journal-title":"International Conference on Very Large Scale Integration (VLSI-SOC)"},{"key":"ref12","first-page":"47","article-title":"Butterfly Unit Supporting Radix-4 and Radix-2 FFT","volume":"30","author":"takala and","year":"2005","journal-title":"Proceedings of the 2005 International TICSP Workshop on Spectral Methods and Multirate Signal Processing SMMSP 2005"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/277044.277166"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/AICCSA.2007.370924"},{"key":"ref15","first-page":"909","article-title":"Latched carry-save adder","volume":"10","author":"earle","year":"1965","journal-title":"IBM Tech Disclosure Bulletin"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/277044.277166"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2007.116"},{"journal-title":"Computer Aritmethic - Algorithms and Hardware Desings","year":"2000","author":"parhami","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/LASCAS.2016.7451037"},{"journal-title":"Nangate 45 nm Open Cell Library","year":"0","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1973.5009159"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-012-9952-2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1090\/S0025-5718-1965-0178586-1"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCCT2.2015.7292750"}],"event":{"name":"2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS)","start":{"date-parts":[[2017,2,20]]},"location":"Bariloche, Argentina","end":{"date-parts":[[2017,2,23]]}},"container-title":["2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7940150\/7948034\/07948101.pdf?arnumber=7948101","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,27]],"date-time":"2017-06-27T23:49:56Z","timestamp":1498607396000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7948101\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,2]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/lascas.2017.7948101","relation":{},"subject":[],"published":{"date-parts":[[2017,2]]}}}