{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,3]],"date-time":"2026-01-03T06:52:06Z","timestamp":1767423126364,"version":"3.28.0"},"reference-count":23,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,2]]},"DOI":"10.1109\/lascas.2018.8399923","type":"proceedings-article","created":{"date-parts":[[2018,7,30]],"date-time":"2018-07-30T13:45:34Z","timestamp":1532958334000},"page":"1-4","source":"Crossref","is-referenced-by-count":2,"title":["FPGA implementation of high-performance asynchronous pipelines with robust control"],"prefix":"10.1109","author":[{"given":"Duarte L.","family":"Oliveira","sequence":"first","affiliation":[]},{"given":"Kledermon","family":"Garcia","sequence":"additional","affiliation":[]},{"given":"Lucas","family":"Santana","sequence":"additional","affiliation":[]},{"given":"Lester A.","family":"Faria","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/SOCDC.2008.4815633"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/LASCAS.2014.6820272"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/INTERCON.2016.7815571"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2002.1000292"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.902206"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.902206"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2007.898279"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2008.73"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1155\/2008\/926851"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/12.391185"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1587\/elex.3.163"},{"journal-title":"Asynchronous Circuit Design","year":"2004","author":"myers","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/63526.63532"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"389","DOI":"10.1109\/TCAD.2005.853689","article-title":"Pipeline Optimization for Asynchronous Circuits: Complexity analysis and an Efficient Optimal Algorithm","volume":"25","author":"kim","year":"2006","journal-title":"IEEE Trans CAD of Integrated Circuits and Systems"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2002.998422"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.842908"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2007.911072"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"687","DOI":"10.1016\/j.sysarc.2004.04.001","article-title":"A clocking technique for FPGA pipelined designs","volume":"50","author":"cadenas","year":"2004","journal-title":"Journal of Systems Architecture"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.898732"},{"key":"ref20","article-title":"Synthesis of Self-Timed VLSI Circuits from Graph-Theory Specifications","author":"\u2013a chu","year":"1987","journal-title":"MIT Dept of EECS"},{"key":"ref22","first-page":"315","article-title":"Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers","volume":"e80 d","author":"cortadella","year":"1997","journal-title":"IEICE Trans on Information and Systems"},{"key":"ref21","first-page":"558","article-title":"Decomposition methods for library binding of speed-independent","author":"sigel","year":"1994","journal-title":"Proc Int Conf Computer-Aided Design"},{"year":"2017","key":"ref23"}],"event":{"name":"2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS)","start":{"date-parts":[[2018,2,25]]},"location":"Puerto Vallarta","end":{"date-parts":[[2018,2,28]]}},"container-title":["2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8392643\/8399896\/08399923.pdf?arnumber=8399923","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T05:54:48Z","timestamp":1643176488000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8399923\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/lascas.2018.8399923","relation":{},"subject":[],"published":{"date-parts":[[2018,2]]}}}