{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,23]],"date-time":"2025-09-23T14:18:13Z","timestamp":1758637093656},"reference-count":12,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,2,1]],"date-time":"2019-02-01T00:00:00Z","timestamp":1548979200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,2,1]],"date-time":"2019-02-01T00:00:00Z","timestamp":1548979200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,2,1]],"date-time":"2019-02-01T00:00:00Z","timestamp":1548979200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,2]]},"DOI":"10.1109\/lascas.2019.8667587","type":"proceedings-article","created":{"date-parts":[[2019,3,18]],"date-time":"2019-03-18T21:40:27Z","timestamp":1552945227000},"page":"21-24","source":"Crossref","is-referenced-by-count":9,"title":["Performance evaluation of Tunnel-FET basic amplifier circuits"],"prefix":"10.1109","author":[{"given":"R. S.","family":"Rangel","sequence":"first","affiliation":[]},{"given":"P. G. D.","family":"Agopian","sequence":"additional","affiliation":[]},{"given":"J.A.","family":"Martino","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488868"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2627369.2627631"},{"key":"ref10","article-title":"A gm\/id based methodology for the design of cmos analog circuits and its application to the synthesis of a silicon-on-insulator micropower ota","author":"silveira","year":"1996","journal-title":"JSSC"},{"journal-title":"The Designer's Guide to Verilog-AMS","year":"2006","author":"kundert","key":"ref6"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/CSTIC.2018.8369184"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2342371"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1088\/0268-1242\/31\/5\/055001"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICCDCS.2014.7016152"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2011.06.030"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2013.2267614"},{"journal-title":"Design of Analog CMOS Integrated Circuits","year":"2001","author":"razavi","key":"ref9"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2012.05.053"}],"event":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","start":{"date-parts":[[2019,2,24]]},"location":"Armenia, Colombia","end":{"date-parts":[[2019,2,27]]}},"container-title":["2019 IEEE 10th Latin American Symposium on Circuits &amp; Systems (LASCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8666669\/8667535\/08667587.pdf?arnumber=8667587","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,14]],"date-time":"2022-07-14T23:13:27Z","timestamp":1657840407000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8667587\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,2]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/lascas.2019.8667587","relation":{},"subject":[],"published":{"date-parts":[[2019,2]]}}}