{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,8]],"date-time":"2025-09-08T06:20:02Z","timestamp":1757312402771,"version":"3.28.0"},"reference-count":23,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,2,1]],"date-time":"2019-02-01T00:00:00Z","timestamp":1548979200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,2,1]],"date-time":"2019-02-01T00:00:00Z","timestamp":1548979200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,2,1]],"date-time":"2019-02-01T00:00:00Z","timestamp":1548979200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,2]]},"DOI":"10.1109\/lascas.2019.8667597","type":"proceedings-article","created":{"date-parts":[[2019,3,18]],"date-time":"2019-03-18T21:40:27Z","timestamp":1552945227000},"page":"201-204","source":"Crossref","is-referenced-by-count":11,"title":["High-Performance Fault Diagnosis Schemes for Efficient Hash Algorithm BLAKE"],"prefix":"10.1109","author":[{"given":"Mehran Mozaffari","family":"Kermani","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Siavash","family":"Bayat-Sarmadi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A-Bon","family":"Ackie","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Reza","family":"Azarderakhsh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2717791"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/s13389-014-0092-8"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2016.7428087"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"1105","DOI":"10.1109\/TCAD.2014.2307002","article-title":"Efficient and concurrent reliable realization of the secure cryptographic SHA-3 algorithm","volume":"33","author":"bayat-sarmadi","year":"2014","journal-title":"IEEE Trans Computer-Aided Design of Integrated Circuits and Systems"},{"key":"ref14","first-page":"302","article-title":"ParTI - Towards combined hardware countermeasures against side-channel and fault-injection attacks","author":"schneider","year":"2016","journal-title":"Proc Crypto"},{"year":"0","author":"algorithm","key":"ref15"},{"key":"ref16","article-title":"Comparing hardware performance of round 3 SHA-3 candidates using multiple hardware architecture in Xilinx and Altera FPGAs","author":"homsirikamol","year":"2011","journal-title":"CRYPT II Hash Workshop 2011"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2010.5681776"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"1746","DOI":"10.1109\/TVLSI.2010.2060373","article-title":"VLSI characterization of the cryptographic hash function BLAKE","volume":"19","author":"henzen","year":"2011","journal-title":"IEEE Trans VLSI"},{"key":"ref19","article-title":"Silicon implementation of SHA-3 finalists: BLAKE, Grøstl, JH, Keccak and Skein","author":"guo","year":"2011","journal-title":"CRYPT II Hash Workshop 2011"},{"key":"ref4","first-page":"59:1","article-title":"Fault detection architectures for post-quantum cryptographic stateless hash-based secure signatures benchmarked on ASIC","volume":"16","author":"mozaffari kermani","year":"2016","journal-title":"ACM Trans Embedded Computing Syst (special issue on Embedded Device Forensics and Security State of the Art Advances)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3159173"},{"key":"ref6","first-page":"113","article-title":"Parity-based concurrent error detection of substitution-permutation network block ciphers","author":"karri","year":"2003","journal-title":"Proc Cryptographic Hardware and Embedded Systems"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2011.60"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/EIT.2009.5189583"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2382715"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-14971-4_5"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/FDTC.2011.11"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228463"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"827","DOI":"10.1109\/TVLSI.2011.2128353","article-title":"Fair and consistent hardware evaluation of fourteen round two SHA-3 candidates","volume":"20","author":"knez?evic","year":"2012","journal-title":"IEEE Trans VLSI"},{"journal-title":"STMicroelectronics","year":"0","key":"ref22"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.1992.224374"},{"journal-title":"Synopsys","year":"0","key":"ref23"}],"event":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","start":{"date-parts":[[2019,2,24]]},"location":"Armenia, Colombia","end":{"date-parts":[[2019,2,27]]}},"container-title":["2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8666669\/8667535\/08667597.pdf?arnumber=8667597","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,14]],"date-time":"2022-07-14T23:14:07Z","timestamp":1657840447000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8667597\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,2]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/lascas.2019.8667597","relation":{},"subject":[],"published":{"date-parts":[[2019,2]]}}}