{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T10:47:39Z","timestamp":1725792459500},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,2]]},"DOI":"10.1109\/lascas45839.2020.9069014","type":"proceedings-article","created":{"date-parts":[[2020,4,17]],"date-time":"2020-04-17T04:28:06Z","timestamp":1587097686000},"page":"1-4","source":"Crossref","is-referenced-by-count":5,"title":["Efficient Power Consumption using Hybrid Emerging Memory Technology for 3D CMPs"],"prefix":"10.1109","author":[{"given":"A.","family":"Asad","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"AL-Obaidy","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"Mohammadi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2015.42"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CCECE.2019.8861762"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-84800-155-8_7"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2015.7238085"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2483028.2483052"},{"key":"ref8","first-page":"22","article-title":"CACTI 6.0: A tool to model large caches","author":"muralimanohar","year":"2009","journal-title":"HP Laboratories"},{"article-title":"NOXIM: Network-on-chip simulator","year":"2010","author":"palesi","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2017.03.011"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2091686"},{"key":"ref1","first-page":"365","article-title":"Dark silicon and the end of multicore scaling","author":"esmaeilzadeh","year":"2011","journal-title":"2011 38th Annual International Symposium on Computer Architecture (ISCA) ISCA"}],"event":{"name":"2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS)","start":{"date-parts":[[2020,2,25]]},"location":"San Jose, Costa Rica","end":{"date-parts":[[2020,2,28]]}},"container-title":["2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9052588\/9068948\/09069014.pdf?arnumber=9069014","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,28]],"date-time":"2022-06-28T21:55:07Z","timestamp":1656453307000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9069014\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,2]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/lascas45839.2020.9069014","relation":{},"subject":[],"published":{"date-parts":[[2020,2]]}}}