{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T09:32:07Z","timestamp":1730280727240,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,2]]},"DOI":"10.1109\/lascas45839.2020.9069016","type":"proceedings-article","created":{"date-parts":[[2020,4,17]],"date-time":"2020-04-17T04:28:06Z","timestamp":1587097686000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["Voltage Drop Mitigation by Adaptive Voltage Scaling using Clock-Data Compensation"],"prefix":"10.1109","author":[{"given":"Andres","family":"Malavasi-Mora","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Renato","family":"Rimolo-Donadio","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2014023"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373409"},{"key":"ref10","first-page":"21","article-title":"Enhancing beneficial jitter using phase-shifted clock distribution","author":"jiao","year":"2008","journal-title":"Proc IEEE Int Symp Low Power Electronics and Design (ISLPED)"},{"key":"ref6","first-page":"32","article-title":"Razor II: In situ error detection and correction for PVT and SER tolerance","author":"das","year":"2009","journal-title":"JSSCC"},{"journal-title":"M Sc dissertation Instituto Tecnol&#x00F3;gico de Costa Rica","article-title":"Voltage Drop Mitigation by Adaptive Voltage Scaling using Clock-Data Compensation","year":"2019","key":"ref11"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870912"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2089657"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007148"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870258"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870925"},{"key":"ref1","first-page":"94","article-title":"A 22nm dynamically adaptive clock distribution for voltage drop tolerance","volume":"48","author":"bowman","year":"2012"}],"event":{"name":"2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS)","start":{"date-parts":[[2020,2,25]]},"location":"San Jose, Costa Rica","end":{"date-parts":[[2020,2,28]]}},"container-title":["2020 IEEE 11th Latin American Symposium on Circuits &amp; Systems (LASCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9052588\/9068948\/09069016.pdf?arnumber=9069016","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,28]],"date-time":"2022-06-28T21:55:06Z","timestamp":1656453306000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9069016\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,2]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/lascas45839.2020.9069016","relation":{},"subject":[],"published":{"date-parts":[[2020,2]]}}}