{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T18:47:34Z","timestamp":1775069254114,"version":"3.50.1"},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,3,1]],"date-time":"2022-03-01T00:00:00Z","timestamp":1646092800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,3,1]],"date-time":"2022-03-01T00:00:00Z","timestamp":1646092800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,3,1]]},"DOI":"10.1109\/lascas53948.2022.9789079","type":"proceedings-article","created":{"date-parts":[[2022,6,8]],"date-time":"2022-06-08T19:43:58Z","timestamp":1654717438000},"page":"1-4","source":"Crossref","is-referenced-by-count":3,"title":["Calibration of Logical Effort Transistor Sizing for On-the-Fly Low-Power Supergate Design"],"prefix":"10.1109","author":[{"given":"Henrique","family":"Kessler","sequence":"first","affiliation":[{"name":"Federal University of Pelotas - UFPel,Postgraduate Program in Computing - PPGC,Pelotas,Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Murilo","family":"Bohlke","sequence":"additional","affiliation":[{"name":"Center for Technological Development - CDTec*"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Leomar S.","family":"da Rosa","sequence":"additional","affiliation":[{"name":"Federal University of Pelotas - UFPel,Postgraduate Program in Computing - PPGC,Pelotas,Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marcelo","family":"Porto","sequence":"additional","affiliation":[{"name":"Federal University of Pelotas - UFPel,Postgraduate Program in Computing - PPGC,Pelotas,Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vinicius V.","family":"Camargo","sequence":"additional","affiliation":[{"name":"Center for Technological Development - CDTec*"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2907722"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC.2019.8920337"},{"key":"ref12","author":"sutherland","year":"1999","journal-title":"Logical Effort Designing Fast CMOS Circuits"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1854153.1854167"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2410764"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2016.7870091"},{"key":"ref16","author":"tsutomu","year":"1999","journal-title":"Switching Theory for Logic Synthesis"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/103724.103725"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2257902"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2247657"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2305847"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702068"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2019.01.008"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429428"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/INNOVATIONS.2012.6207724"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1993.393332"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/NILES50944.2020.9257934"}],"event":{"name":"2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS)","location":"Puerto Varas, Chile","start":{"date-parts":[[2022,3,1]]},"end":{"date-parts":[[2022,3,4]]}},"container-title":["2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9789038\/9789039\/09789079.pdf?arnumber=9789079","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,18]],"date-time":"2022-07-18T20:48:14Z","timestamp":1658177294000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9789079\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,3,1]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/lascas53948.2022.9789079","relation":{},"subject":[],"published":{"date-parts":[[2022,3,1]]}}}