{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T00:11:38Z","timestamp":1725495098719},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,3]]},"DOI":"10.1109\/latw.2015.7102403","type":"proceedings-article","created":{"date-parts":[[2015,5,8]],"date-time":"2015-05-08T11:54:45Z","timestamp":1431086085000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Complex delay fault reasoning with sequential 7-valued algebra"],"prefix":"10.1109","author":[{"given":"Jaak","family":"Kousaar","sequence":"first","affiliation":[]},{"given":"Raimund","family":"Ubar","sequence":"additional","affiliation":[]},{"given":"Igor","family":"Aleksejev","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2004.1387378"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511816321"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2049462"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2010216"},{"key":"ref14","doi-asserted-by":"crossref","DOI":"10.1109\/ETS.2007.43","article-title":"Ultra Fast Parallel Fault Analysis on Structural BDDs","author":"ubar","year":"2007","journal-title":"European Test Symposium"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5456929"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/123186.123432"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.909796"},{"key":"ref3","first-page":"423","article-title":"CMOS IC stuck-open fault electrical effects and design considerations","author":"wadsack","year":"1989","journal-title":"Proc IEEE L"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2001.966683"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1996.510832"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2161786"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.827598"},{"key":"ref2","first-page":"342","article-title":"Model for delay faults based upon paths","author":"smith","year":"1985","journal-title":"Proc Int Test Conf"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.1987.295104"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/GLSV.1996.497634"}],"event":{"name":"2015 16th Latin-American Test Symposium (LATS)","start":{"date-parts":[[2015,3,25]]},"location":"Puerto Vallarta, Mexico","end":{"date-parts":[[2015,3,27]]}},"container-title":["2015 16th Latin-American Test Symposium (LATS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7101754\/7102396\/07102403.pdf?arnumber=7102403","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T07:12:55Z","timestamp":1498201975000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7102403\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,3]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/latw.2015.7102403","relation":{},"subject":[],"published":{"date-parts":[[2015,3]]}}}