{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T16:08:23Z","timestamp":1761581303814},"reference-count":10,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2016,1,1]],"date-time":"2016-01-01T00:00:00Z","timestamp":1451606400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Comput. Arch. Lett."],"published-print":{"date-parts":[[2016,1,1]]},"DOI":"10.1109\/lca.2015.2428699","type":"journal-article","created":{"date-parts":[[2015,5,1]],"date-time":"2015-05-01T18:56:23Z","timestamp":1430506583000},"page":"62-65","source":"Crossref","is-referenced-by-count":15,"title":["Towards High-Performance Bufferless NoCs with SCEPTER"],"prefix":"10.1109","volume":"15","author":[{"given":"Bhavya K.","family":"Daya","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Li-Shiuan","family":"Peh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Anantha P.","family":"Chandrakasan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2012.8"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749724"},{"key":"ref10","first-page":"2","article-title":"Evaluation of the RAW microprocessor: An exposed-wire-delay architecture for ILP and streams","author":"psota","year":"0","journal-title":"Proc Int Symp Comput Archit"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2012.22"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378783"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.18"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522334"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2678373.2665680"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555781"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/SBAC-PAD.2012.44"}],"container-title":["IEEE Computer Architecture Letters"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10208\/7493716\/07100857.pdf?arnumber=7100857","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T02:34:55Z","timestamp":1633919695000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7100857\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,1,1]]},"references-count":10,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/lca.2015.2428699","relation":{},"ISSN":["1556-6056"],"issn-type":[{"value":"1556-6056","type":"print"}],"subject":[],"published":{"date-parts":[[2016,1,1]]}}}