{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,2]],"date-time":"2025-11-02T13:46:57Z","timestamp":1762091217469,"version":"build-2065373602"},"reference-count":15,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,7,1]],"date-time":"2023-07-01T00:00:00Z","timestamp":1688169600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"CSC scholarship","award":["201903170128"],"award-info":[{"award-number":["201903170128"]}]},{"DOI":"10.13039\/501100005416","name":"Norges Forskningsr\u00e5d","doi-asserted-by":"publisher","award":["286596"],"award-info":[{"award-number":["286596"]}],"id":[{"id":"10.13039\/501100005416","id-type":"DOI","asserted-by":"publisher"}]},{"name":"UGent-BOF-GOA","award":["01G01421"],"award-info":[{"award-number":["01G01421"]}]},{"DOI":"10.13039\/501100000781","name":"European Research Council","doi-asserted-by":"publisher","award":["741097"],"award-info":[{"award-number":["741097"]}],"id":[{"id":"10.13039\/501100000781","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Comput. Arch. Lett."],"published-print":{"date-parts":[[2023,7]]},"DOI":"10.1109\/lca.2023.3313203","type":"journal-article","created":{"date-parts":[[2023,9,8]],"date-time":"2023-09-08T17:27:48Z","timestamp":1694194068000},"page":"145-148","source":"Crossref","is-referenced-by-count":5,"title":["Balancing Performance Against Cost and Sustainability in Multi-Chip-Module GPUs"],"prefix":"10.1109","volume":"22","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6690-3718","authenticated-orcid":false,"given":"Shiqing","family":"Zhang","sequence":"first","affiliation":[{"name":"Ghent University, Gent, Belgium"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-7762-2878","authenticated-orcid":false,"given":"Mahmood","family":"Naderan-Tahan","sequence":"additional","affiliation":[{"name":"Ghent University, Gent, Belgium"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9147-5228","authenticated-orcid":false,"given":"Magnus","family":"Jahre","sequence":"additional","affiliation":[{"name":"Norwegian University of Science and Technology (NTNU), Trondheim, Norway"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8792-4473","authenticated-orcid":false,"given":"Lieven","family":"Eeckhout","sequence":"additional","affiliation":[{"name":"Ghent University, Gent, Belgium"}]}],"member":"263","reference":[{"year":"2022","key":"ref13","article-title":"NVLINK and NVSwitch"},{"year":"2022","key":"ref12","article-title":"NVIDIA H100 tensor core GPU architecture"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/3579371.3589078"},{"article-title":"TSMC 5-nanometer update","year":"2019","author":"schor","key":"ref14"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10137172"},{"article-title":"Yield modeling and analysis","year":"2014","author":"leachman","key":"ref10"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2019.00063"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080231"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830808"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA51647.2021.00076"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00047"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2004.836656"},{"key":"ref3","first-page":"41.4.1","article-title":"DTCO including sustainability: Power-performance-area-cost-environmental score (PPACE) analysis for logic technologies","author":"bardon","year":"2020","journal-title":"Proc Int Electron Devices Meeting"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2022.3218034"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2022.3217366"}],"container-title":["IEEE Computer Architecture Letters"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10208\/10189818\/10244005.pdf?arnumber=10244005","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,11,6]],"date-time":"2023-11-06T19:11:58Z","timestamp":1699297918000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10244005\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,7]]},"references-count":15,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/lca.2023.3313203","relation":{},"ISSN":["1556-6056","1556-6064","2473-2575"],"issn-type":[{"type":"print","value":"1556-6056"},{"type":"electronic","value":"1556-6064"},{"type":"electronic","value":"2473-2575"}],"subject":[],"published":{"date-parts":[[2023,7]]}}}