{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,18]],"date-time":"2025-12-18T18:40:59Z","timestamp":1766083259117,"version":"3.48.0"},"reference-count":12,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T00:00:00Z","timestamp":1751328000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T00:00:00Z","timestamp":1751328000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T00:00:00Z","timestamp":1751328000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100004826","name":"Beijing Natural Science Foundation","doi-asserted-by":"publisher","award":["L234078"],"award-info":[{"award-number":["L234078"]}],"id":[{"id":"10.13039\/501100004826","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Comput. Arch. Lett."],"published-print":{"date-parts":[[2025,7]]},"DOI":"10.1109\/lca.2025.3637756","type":"journal-article","created":{"date-parts":[[2025,11,27]],"date-time":"2025-11-27T18:57:02Z","timestamp":1764269822000},"page":"381-384","source":"Crossref","is-referenced-by-count":0,"title":["CODA: A Computation-Driven Paradigm for Sparse DNN Acceleration"],"prefix":"10.1109","volume":"24","author":[{"ORCID":"https:\/\/orcid.org\/0009-0001-8460-8173","authenticated-orcid":false,"given":"Yanhuan","family":"Liu","sequence":"first","affiliation":[{"name":"State Key Lab of Processors, Institute of Computing Technology, CAS, Beijing, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4069-2251","authenticated-orcid":false,"given":"Wenming","family":"Li","sequence":"additional","affiliation":[{"name":"State Key Lab of Processors, Institute of Computing Technology, CAS, Beijing, China"}]},{"given":"Kunming","family":"Zhang","sequence":"additional","affiliation":[{"name":"State Key Lab of Processors, Institute of Computing Technology, CAS, Beijing, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3905-6936","authenticated-orcid":false,"given":"Tianyu","family":"Liu","sequence":"additional","affiliation":[{"name":"State Key Lab of Processors, Institute of Computing Technology, CAS, Beijing, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4598-1685","authenticated-orcid":false,"given":"Xiaochun","family":"Ye","sequence":"additional","affiliation":[{"name":"State Key Lab of Processors, Institute of Computing Technology, CAS, Beijing, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0005-0494-6332","authenticated-orcid":false,"given":"Xuejun","family":"An","sequence":"additional","affiliation":[{"name":"State Key Lab of Processors, Institute of Computing Technology, CAS, Beijing, China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2022.3226481"},{"key":"ref2","first-page":"20378","article-title":"Movement pruning: Adaptive sparsity by fine-tuning","volume-title":"Proc. Int. Conf. Neural Inf. Process. Syst.","author":"Sanh"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3392717.3392751"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA56546.2023.10070977"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3575693.3575706"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/3582016.3582069"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA59077.2024.00072"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3688612"},{"year":"2021","key":"ref10","article-title":"NVIDIA jetson orin: Embedded systems for autonomous machines"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.90"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2018.00474"}],"container-title":["IEEE Computer Architecture Letters"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10208\/11062520\/11270171.pdf?arnumber=11270171","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,12,18]],"date-time":"2025-12-18T18:32:16Z","timestamp":1766082736000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11270171\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,7]]},"references-count":12,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/lca.2025.3637756","relation":{},"ISSN":["1556-6056","1556-6064","2473-2575"],"issn-type":[{"type":"print","value":"1556-6056"},{"type":"electronic","value":"1556-6064"},{"type":"electronic","value":"2473-2575"}],"subject":[],"published":{"date-parts":[[2025,7]]}}}