{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,1]],"date-time":"2025-11-01T21:40:54Z","timestamp":1762033254935},"reference-count":15,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2015,3,1]],"date-time":"2015-03-01T00:00:00Z","timestamp":1425168000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"TCS Research Fellowship Award, granted to S. Saha"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Embedded Syst. Lett."],"published-print":{"date-parts":[[2015,3]]},"DOI":"10.1109\/les.2015.2396069","type":"journal-article","created":{"date-parts":[[2015,1,23]],"date-time":"2015-01-23T21:53:53Z","timestamp":1422050033000},"page":"23-26","source":"Crossref","is-referenced-by-count":27,"title":["Scheduling Dynamic Hard Real-Time Task Sets on Fully and Partially Reconfigurable Platforms"],"prefix":"10.1109","volume":"7","author":[{"given":"Sangeet","family":"Saha","sequence":"first","affiliation":[]},{"given":"Arnab","family":"Sarkar","sequence":"additional","affiliation":[]},{"given":"Amlan","family":"Chakrabarti","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","author":"liu","year":"2000","journal-title":"Real-Time Systems"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2007.70763"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ESTMED.2010.5666975"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2012.43"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/EMRTS.2000.853990"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ECRTS.2010.34"},{"key":"ref4","first-page":"265","article-title":"Communication cost reduction for hardware tasks placed on homogeneous reconfigurable resource","author":"khuat","year":"2013","journal-title":"Proc Design and Arch Signal Image Process Conf (DASIP)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2448556.2448636"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-36812-7_18"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DASIP.2010.5706269"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-00641-8_22"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2010.07.016"},{"key":"ref2","author":"sharma","year":"0"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2000832.2000840"},{"key":"ref9","first-page":"117","article-title":"Periodic real-time scheduling for fpga computers","author":"danne","year":"2005","journal-title":"Proc Int Workshop on Intell Solutions Embedded Syst"}],"container-title":["IEEE Embedded Systems Letters"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4563995\/7047998\/07018928.pdf?arnumber=7018928","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:46:19Z","timestamp":1642005979000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7018928\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,3]]},"references-count":15,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/les.2015.2396069","relation":{},"ISSN":["1943-0663","1943-0671"],"issn-type":[{"value":"1943-0663","type":"print"},{"value":"1943-0671","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,3]]}}}