{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T16:50:26Z","timestamp":1740156626719,"version":"3.37.3"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2018,3,1]],"date-time":"2018-03-01T00:00:00Z","timestamp":1519862400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100001659","name":"German Research Foundation within the Collaborative Research Centre \u201cOn-The-Fly Computing\u201d","doi-asserted-by":"publisher","award":["SFB 901"],"award-info":[{"award-number":["SFB 901"]}],"id":[{"id":"10.13039\/501100001659","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Embedded Syst. Lett."],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.1109\/les.2017.2758200","type":"journal-article","created":{"date-parts":[[2017,9,29]],"date-time":"2017-09-29T18:44:08Z","timestamp":1506710648000},"page":"22-25","source":"Crossref","is-referenced-by-count":4,"title":["Validity of Software Verification Results on Approximate Hardware"],"prefix":"10.1109","volume":"10","author":[{"given":"Tobias","family":"Isenberg","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marie-Christine","family":"Jakobs","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9237-2319","authenticated-orcid":false,"given":"Felix","family":"Pauck","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2385-7512","authenticated-orcid":false,"given":"Heike","family":"Wehrheim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","article-title":"Deriving approximation tolerance constraints from verification runs","volume":"abs 1604 8784","author":"isenberg","year":"2016","journal-title":"CoRR"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-63166-6_10"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-22110-1_16"},{"article-title":"The SMT-LIB standard: Version 2.5","year":"2015","author":"barrett","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1133981.1134029"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/512950.512973"},{"journal-title":"Generierung von Eigenschaftsprüfern in einem hardware\/software-co-verifikationsverfahren","year":"2014","author":"pauck","key":"ref16"},{"journal-title":"Yosys Open SYnthesis Suite","year":"2017","author":"wolf","key":"ref17"},{"journal-title":"ABC A System for Sequential Synthesis and Verification","year":"2005","key":"ref18"},{"journal-title":"PicoSAT","year":"2013","author":"biere","key":"ref19"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1993498.1993518"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2426890.2426901"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2660193.2660231"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2509136.2509546"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-40648-0_19"},{"key":"ref7","article-title":"Towards automated differential program verification for approximate computing","author":"lahiri","year":"2015","journal-title":"Proc Workshop Approx Comput Across Syst Stack"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2013.6569370"},{"key":"ref9","first-page":"1","article-title":"ASLAN: Synthesis of approximate sequential circuits","author":"ranjan","year":"2014","journal-title":"Proc DATE"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2742482"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-46681-0_31"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403679"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744778"},{"key":"ref24","first-page":"69","article-title":"An enhanced low-power high-speed adder for error-tolerant application","author":"zhu","year":"2009","journal-title":"Proc Int Symp Integr Circuits"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228509"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691096"}],"container-title":["IEEE Embedded Systems Letters"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4563995\/8303002\/08053741.pdf?arnumber=8053741","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:22:56Z","timestamp":1642004576000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8053741\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":25,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/les.2017.2758200","relation":{},"ISSN":["1943-0663","1943-0671"],"issn-type":[{"type":"print","value":"1943-0663"},{"type":"electronic","value":"1943-0671"}],"subject":[],"published":{"date-parts":[[2018,3]]}}}