{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,5]],"date-time":"2025-12-05T12:20:02Z","timestamp":1764937202965,"version":"3.37.3"},"reference-count":16,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2021,9,1]],"date-time":"2021-09-01T00:00:00Z","timestamp":1630454400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,9,1]],"date-time":"2021-09-01T00:00:00Z","timestamp":1630454400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,9,1]],"date-time":"2021-09-01T00:00:00Z","timestamp":1630454400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Visvesvaraya Ph.D. Scheme, MeitY, Govt. of India","award":["MEITY-PHD-2671"],"award-info":[{"award-number":["MEITY-PHD-2671"]}]},{"DOI":"10.13039\/501100008628","name":"ZCU102 Board","doi-asserted-by":"publisher","award":["\u201cSMDP-C2SD\u201d"],"award-info":[{"award-number":["\u201cSMDP-C2SD\u201d"]}],"id":[{"id":"10.13039\/501100008628","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Embedded Syst. Lett."],"published-print":{"date-parts":[[2021,9]]},"DOI":"10.1109\/les.2020.3017455","type":"journal-article","created":{"date-parts":[[2020,8,18]],"date-time":"2020-08-18T20:59:07Z","timestamp":1597784347000},"page":"114-117","source":"Crossref","is-referenced-by-count":16,"title":["Design Space Exploration of FPGA-Based System With Multiple DNN Accelerators"],"prefix":"10.1109","volume":"13","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3711-0396","authenticated-orcid":false,"given":"Rajesh","family":"Kedia","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shikha","family":"Goel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Balakrishnan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kolin","family":"Paul","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rijurekha","family":"Sen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2019.00100"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2680542"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2010.5647727"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2019.2901224"},{"key":"ref14","first-page":"1","article-title":"System level synthesis of hardware for DSP applications using pre-characterized function implementations","author":"li","year":"2013","journal-title":"Proc Conf Hardw \/Softw Codes Syst Syn (CODES+ISSS)"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317757"},{"journal-title":"Zynq UltraScale+ MPSoC ZCU102 evaluation kit","year":"2020","key":"ref16"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2705069"},{"journal-title":"DPU for CNN v3 0","year":"2019","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2019.00058"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/AICAS.2019.8771615"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/REAL.2004.20"},{"journal-title":"Xilinx AI Model Zoo","year":"2019","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2018.00072"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3289185"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS.2015.19"}],"container-title":["IEEE Embedded Systems Letters"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4563995\/9524350\/09170518.pdf?arnumber=9170518","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T14:53:01Z","timestamp":1652194381000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9170518\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,9]]},"references-count":16,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/les.2020.3017455","relation":{},"ISSN":["1943-0663","1943-0671"],"issn-type":[{"type":"print","value":"1943-0663"},{"type":"electronic","value":"1943-0671"}],"subject":[],"published":{"date-parts":[[2021,9]]}}}