{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T09:29:51Z","timestamp":1763458191928,"version":"3.37.3"},"reference-count":19,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2024,3,1]],"date-time":"2024-03-01T00:00:00Z","timestamp":1709251200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,3,1]],"date-time":"2024-03-01T00:00:00Z","timestamp":1709251200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,3,1]],"date-time":"2024-03-01T00:00:00Z","timestamp":1709251200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100002322","name":"Coordena\u00e7\u00e3o de Aperfei\u00e7oamento de Pessoal de N\u00edvel Superior-Brasil (CAPES) under Finance Code 001","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100002322","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100000288","name":"Royal Society-Newton Advanced Fellowship","doi-asserted-by":"publisher","award":["NA160108"],"award-info":[{"award-number":["NA160108"]}],"id":[{"id":"10.13039\/501100000288","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Embedded Syst. Lett."],"published-print":{"date-parts":[[2024,3]]},"DOI":"10.1109\/les.2023.3240625","type":"journal-article","created":{"date-parts":[[2023,1,30]],"date-time":"2023-01-30T19:48:50Z","timestamp":1675108130000},"page":"25-28","source":"Crossref","is-referenced-by-count":4,"title":["Evaluating the Effects of Reducing Voltage Margins for Energy-Efficient Operation of MPSoCs"],"prefix":"10.1109","volume":"16","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0650-6323","authenticated-orcid":false,"given":"Diego V. Cirilo do","family":"Nascimento","sequence":"first","affiliation":[{"name":"Instituto Federal do Rio Grande do Norte, Natal, Brazil"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6017-3320","authenticated-orcid":false,"given":"Kyriakos","family":"Georgiou","sequence":"additional","affiliation":[{"name":"Department of Computer Science, University of Bristol, Bristol, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9746-1409","authenticated-orcid":false,"given":"Kerstin I.","family":"Eder","sequence":"additional","affiliation":[{"name":"Department of Computer Science, University of Bristol, Bristol, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8747-4580","authenticated-orcid":false,"given":"Samuel","family":"Xavier-de-Souza","sequence":"additional","affiliation":[{"name":"Department of Computer Engineering and Automation, Universidade Federal do Rio Grande do Norte, Natal, Brazil"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2017.2741419"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2000.898070"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/4.881202"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2017.3001246"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1629917"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523226"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485948"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS50870.2020.9159716"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.5753\/sbesc_estendido.2020.13100"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.54"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.2992684"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2017.8046198"},{"key":"ref13","first-page":"503","article-title":"Harnessing voltage margins for energy efficiency in multicore CPUs","volume-title":"Proc. 50th Annu. IEEE\/ACM Int. Symp. Microarchit. (MICRO-50)","author":"Papadimitriou"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2020.2989813"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2018.8494247"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI54635.2022.00089"},{"volume-title":"GAP8 Hardware Reference Manual","year":"2018","key":"ref17"},{"volume-title":"Power Sensing Shield for ST Discovery STM32F407VG-Based Board: MAGEEC\/Powersense-Shield","year":"2016","key":"ref18"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/SBESC53686.2021.9628300"}],"container-title":["IEEE Embedded Systems Letters"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4563995\/10453001\/10029876.pdf?arnumber=10029876","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,2]],"date-time":"2024-03-02T16:42:09Z","timestamp":1709397729000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10029876\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,3]]},"references-count":19,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/les.2023.3240625","relation":{},"ISSN":["1943-0663","1943-0671"],"issn-type":[{"type":"print","value":"1943-0663"},{"type":"electronic","value":"1943-0671"}],"subject":[],"published":{"date-parts":[[2024,3]]}}}