{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,2]],"date-time":"2026-07-02T05:28:57Z","timestamp":1782970137925,"version":"3.54.5"},"reference-count":7,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2022YFB2802404"],"award-info":[{"award-number":["2022YFB2802404"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Solid-State Circuits Lett."],"published-print":{"date-parts":[[2025]]},"DOI":"10.1109\/lssc.2025.3558928","type":"journal-article","created":{"date-parts":[[2025,4,8]],"date-time":"2025-04-08T18:13:14Z","timestamp":1744135994000},"page":"117-120","source":"Crossref","is-referenced-by-count":2,"title":["A Segmented Precision Configurable Computing-in-Memory Macro With Dual-Edge Time-Domain Structure"],"prefix":"10.1109","volume":"8","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-1566-5809","authenticated-orcid":false,"given":"Chang","family":"Xue","sequence":"first","affiliation":[{"name":"School of Integrated Circuits and the Beijing Advanced Innovation Center for Integrated Circuits, Peking University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-0593-4842","authenticated-orcid":false,"given":"Youming","family":"Yang","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits and the Beijing Advanced Innovation Center for Integrated Circuits, Peking University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Siyuan","family":"He","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits and the Beijing Advanced Innovation Center for Integrated Circuits, Peking University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5143-2247","authenticated-orcid":false,"given":"Gang","family":"Du","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits and the Beijing Advanced Innovation Center for Integrated Circuits, Peking University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4951-4286","authenticated-orcid":false,"given":"Yuan","family":"Wang","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits and the Beijing Advanced Innovation Center for Integrated Circuits, Peking University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3281-4493","authenticated-orcid":false,"given":"Yandong","family":"He","sequence":"additional","affiliation":[{"name":"School of Integrated Circuits and the Beijing Advanced Innovation Center for Integrated Circuits, Peking University, Beijing, China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3343669"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3200515"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3309966"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3083275"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3095232"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454489"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2024.3369058"}],"container-title":["IEEE Solid-State Circuits Letters"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/8011414\/10804564\/10955742.pdf?arnumber=10955742","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,4,25]],"date-time":"2025-04-25T17:42:44Z","timestamp":1745602964000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10955742\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/lssc.2025.3558928","relation":{},"ISSN":["2573-9603"],"issn-type":[{"value":"2573-9603","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025]]}}}