{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,9,13]],"date-time":"2023-09-13T18:41:52Z","timestamp":1694630512920},"reference-count":15,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[1986,10,1]],"date-time":"1986-10-01T00:00:00Z","timestamp":528508800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Computer"],"published-print":{"date-parts":[[1986,10]]},"DOI":"10.1109\/mc.1986.1663072","type":"journal-article","created":{"date-parts":[[2007,9,4]],"date-time":"2007-09-04T20:35:32Z","timestamp":1188938132000},"page":"60-68","source":"Crossref","is-referenced-by-count":14,"title":["A 32-bit RISC Implemented in Enhancement-Mode JFET GaAs"],"prefix":"10.1109","volume":"19","author":[{"family":"Rasset","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Niederland","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Lane","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Geideman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","author":"katevenis","year":"1983","journal-title":"Reduced Instruction Set Computer Architectures for VLSI"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/800050.801824"},{"key":"ref12","author":"chow","year":"1984","journal-title":"A Portable Machine-Independent Global Optimizer&#x2014 Design and Measurements"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1014194.800941"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1067649.801709"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1982.1675982"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/EDL.1984.25817"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MC.1986.1663177"},{"key":"ref6","volume":"11","author":"zuleeg","year":"1985","journal-title":"VLSI Electronics Microelectronic Science"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/T-ED.1978.19147"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676395"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"25","DOI":"10.1145\/641914.641917","article-title":"the case for the reduced instruction set computer","volume":"8","author":"patterson","year":"1980","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"ref2","first-page":"260","article-title":"design and performance tradeoffs in the use of vlsi and gallium arsenide in high clockrate signal processors","author":"gilbert","year":"1984","journal-title":"Proc IEEE ICCD 84"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"30","DOI":"10.1109\/MSPEC.1983.6370057","article-title":"integrated circuits: the case for gallium arsenide","volume":"20","author":"eden","year":"1983","journal-title":"IEEE Spectrum"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/800050.801820"}],"container-title":["Computer"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/2\/34811\/01663072.pdf?arnumber=1663072","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:29:58Z","timestamp":1638217798000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1663072\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1986,10]]},"references-count":15,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/mc.1986.1663072","relation":{},"ISSN":["0018-9162"],"issn-type":[{"value":"0018-9162","type":"print"}],"subject":[],"published":{"date-parts":[[1986,10]]}}}