{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,7]],"date-time":"2026-01-07T08:00:21Z","timestamp":1767772821561},"reference-count":10,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Computer"],"published-print":{"date-parts":[[2017]]},"DOI":"10.1109\/mc.2017.3001236","type":"journal-article","created":{"date-parts":[[2017,8,1]],"date-time":"2017-08-01T18:33:11Z","timestamp":1501612391000},"page":"69-73","source":"Crossref","is-referenced-by-count":32,"title":["Sustaining Moore's law with 3D chips"],"prefix":"10.1109","volume":"50","author":[{"given":"Erik P.","family":"DeBenedictis","sequence":"first","affiliation":[]},{"given":"Mustafa","family":"Badaroglu","sequence":"additional","affiliation":[]},{"given":"An","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Thomas M.","family":"Conte","sequence":"additional","affiliation":[]},{"given":"Paolo","family":"Gargini","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"26","article-title":"Vertical Cross-Point Resistance Change Memory for Ultra-High Density Non-Volatile Memory Applications","author":"yoon","year":"0","journal-title":"Proc Symp VLSI Technology (VLSI-Technology 09)"},{"key":"ref3","year":"2015","journal-title":"High Bandwidth Memory (HBM) DRAM JESD235A Item 1797 99F"},{"key":"ref10","first-page":"307","article-title":"Sorting Networks and Their Applications","author":"batcher","year":"0","journal-title":"Proc Am Federation of Information Processing Soc Spring Joint Computer Conf (AFIPS 68)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1609\/aimag.v31i3.2303"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2980068"},{"key":"ref8","author":"tran","year":"0","journal-title":"Hierarchical Identify Verify Exploit"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1038\/nature16961"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/N-SSC.2006.4785860"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1137\/1.9780898719918"},{"key":"ref1","year":"2017","journal-title":"International Roadmap for Devices and Systems"}],"container-title":["Computer"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/2\/7999114\/07999139.pdf?arnumber=7999139","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:20:40Z","timestamp":1642004440000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7999139\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017]]},"references-count":10,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/mc.2017.3001236","relation":{},"ISSN":["0018-9162"],"issn-type":[{"value":"0018-9162","type":"print"}],"subject":[],"published":{"date-parts":[[2017]]}}}