{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T01:59:40Z","timestamp":1771552780863,"version":"3.50.1"},"reference-count":15,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2003,12,1]],"date-time":"2003-12-01T00:00:00Z","timestamp":1070236800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Commun. Mag."],"published-print":{"date-parts":[[2003,12]]},"DOI":"10.1109\/mcom.2003.1252803","type":"journal-article","created":{"date-parts":[[2003,12,22]],"date-time":"2003-12-22T15:42:26Z","timestamp":1072107746000},"page":"86-91","source":"Crossref","is-referenced-by-count":62,"title":["A high-throughput low-cost aes processor"],"prefix":"10.1109","volume":"41","author":[{"family":"Chih-Pin Su","sequence":"first","affiliation":[]},{"family":"Tsung-Fu Lin","sequence":"additional","affiliation":[]},{"family":"Chih-Tsun Huang","sequence":"additional","affiliation":[]},{"family":"Cheng-Wen Wu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.6028\/nist.fips.197"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44687-7_17"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-45439-X_15"},{"key":"ref4","first-page":"207","article-title":"A Fully Pipelined Memoryless 17.8 Gb\/s AEs-128 Encryptor","volume-title":"Proc. Int\u2019l. Symp. FPGA","author":"Jarvinen","year":"2003"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.808300"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44709-1_8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/iccd.2002.1106754"},{"key":"ref8","volume-title":"Efficient Implementation of the Rijndael 5-box","author":"Rijmen"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-45682-1_15"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-45760-7_6"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/APASIC.2002.1031538"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2003.1190589"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-36400-5_14"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-45238-6_25"},{"key":"ref15","article-title":"Hardware Evaluation of the AEs Finalists","volume-title":"Proc. 3rd AES Candidate Conf","author":"Ichikawa","year":"2000"}],"container-title":["IEEE Communications Magazine"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/35\/28028\/01252803.pdf?arnumber=1252803","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,20]],"date-time":"2025-03-20T09:40:56Z","timestamp":1742463656000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1252803\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003,12]]},"references-count":15,"journal-issue":{"issue":"12","published-print":{"date-parts":[[2003,12]]}},"URL":"https:\/\/doi.org\/10.1109\/mcom.2003.1252803","relation":{},"ISSN":["0163-6804"],"issn-type":[{"value":"0163-6804","type":"print"}],"subject":[],"published":{"date-parts":[[2003,12]]}}}