{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T06:32:52Z","timestamp":1767249172069,"version":"3.48.0"},"reference-count":19,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,12,15]],"date-time":"2025-12-15T00:00:00Z","timestamp":1765756800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,12,15]],"date-time":"2025-12-15T00:00:00Z","timestamp":1765756800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,12,15]]},"DOI":"10.1109\/mcsoc67473.2025.00117","type":"proceedings-article","created":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T18:41:58Z","timestamp":1767206518000},"page":"727-733","source":"Crossref","is-referenced-by-count":0,"title":["An FPGA-Based Hardware-Software Co-Design Approach for Embedded Machine Learning Acceleration"],"prefix":"10.1109","author":[{"given":"Obed K.","family":"Allotey Babington","sequence":"first","affiliation":[{"name":"Ashesi University,Department of Engineering,Accra,Ghana"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N.","family":"Amanquah","sequence":"additional","affiliation":[{"name":"Ashesi University,Department of Engineering,Accra,Ghana"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.3390\/s21134412"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/isscc19947.2020.9063049"},{"key":"ref3","article-title":"Soft core processors and embedded processing: A survey and analysis","volume-title":"Proc. 16th Annu. Workshop Circuits Syst. Signal Process.","author":"Calder\u00f3n","year":"2005"},{"key":"ref4","article-title":"Hardware accelerated embedded machine learning","author":"Baidoo","year":"2023","journal-title":"Senior Capstone Paper"},{"key":"ref5","article-title":"The RISC-V instruction set manual, volume I: user-level ISA, version 2.0","volume-title":"University of California, Berkeley","author":"Waterman","year":"2011"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/j.cose.2023.103677"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1509288.1509294"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.3390\/computers11050076"},{"key":"ref9","article-title":"Evaluation of Softprocessor RISC-V for Edge Computing Applications","volume-title":"Proc. RISC-V Days Tokyo","author":"Montesdeoca","year":"2024"},{"key":"ref10","first-page":"18","article-title":"Acceleration framework using MicroBlaze soft-core processors on FPGAs","volume":"4","author":"Jadhav","year":"2015","journal-title":"Int. J. Recent Dev. Eng. Technol."},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.3390\/jlpea11020020"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.3390\/chips4020013"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2587683"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.3390\/rs14133130"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/CAC57257.2022.10055324"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1016\/j.procs.2023.01.029"},{"volume-title":"MicroBlaze processor reference guide","year":"2024","key":"ref17"},{"volume-title":"Vivado Design Suite User Guide","year":"2025","key":"ref18"},{"volume-title":"Vitis Unified Software Platform User Guide","year":"2025","key":"ref19"}],"event":{"name":"2025 IEEE 18th International Symposium on Embedded Multicore\/Many-core Systems-on-Chip (MCSoC)","start":{"date-parts":[[2025,12,15]]},"location":"Singapore, Singapore","end":{"date-parts":[[2025,12,18]]}},"container-title":["2025 IEEE 18th International Symposium on Embedded Multicore\/Many-core Systems-on-Chip (MCSoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11310785\/11310847\/11310853.pdf?arnumber=11310853","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T06:29:28Z","timestamp":1767248968000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11310853\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,12,15]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/mcsoc67473.2025.00117","relation":{},"subject":[],"published":{"date-parts":[[2025,12,15]]}}}