{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,3,1]],"date-time":"2024-03-01T16:23:25Z","timestamp":1709310205131},"reference-count":12,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2013,8,1]],"date-time":"2013-08-01T00:00:00Z","timestamp":1375315200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Des. Test"],"published-print":{"date-parts":[[2013,8]]},"DOI":"10.1109\/mdat.2013.2272693","type":"journal-article","created":{"date-parts":[[2013,7,10]],"date-time":"2013-07-10T18:03:16Z","timestamp":1373479396000},"page":"8-15","source":"Crossref","is-referenced-by-count":3,"title":["Linking the Verification and Validation of Complex Integrated Circuits Through Shared Coverage Metrics"],"prefix":"10.1109","volume":"30","author":[{"given":"Eddie","family":"Hung","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Brad","family":"Quinton","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Steven J. E.","family":"Wilton","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2007.4392804"},{"key":"ref3","article-title":"A unified methodology for pre-silicon verification and post-silicon validation","author":"adir","year":"2011","journal-title":"Proc Design Autom Test Eur Conf Exhibit"},{"key":"ref10","year":"2012","journal-title":"Certus Debug Suite"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.896905"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2435264.2435272"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2011.6113982"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2145694.2145708"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1146916"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2007.157"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837280"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/54.936247"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837278"}],"container-title":["IEEE Design &amp; Test"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6221038\/6658894\/06556981.pdf?arnumber=6556981","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:43:44Z","timestamp":1642005824000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6556981\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,8]]},"references-count":12,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/mdat.2013.2272693","relation":{},"ISSN":["2168-2356","2168-2364"],"issn-type":[{"value":"2168-2356","type":"print"},{"value":"2168-2364","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,8]]}}}