{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T04:12:14Z","timestamp":1781842334180,"version":"3.54.5"},"reference-count":32,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2014,10,1]],"date-time":"2014-10-01T00:00:00Z","timestamp":1412121600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Des. Test"],"published-print":{"date-parts":[[2014,10]]},"DOI":"10.1109\/mdat.2014.2332153","type":"journal-article","created":{"date-parts":[[2014,6,20]],"date-time":"2014-06-20T21:11:14Z","timestamp":1403298674000},"page":"9-17","source":"Crossref","is-referenced-by-count":11,"title":["Silicon Nanophotonics for Future Multicore Architectures: Opportunities and Challenges"],"prefix":"10.1109","volume":"31","author":[{"family":"Yi Xu","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sudeep","family":"Pasricha","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/JLT.2013.2290306"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1364\/OFC.2010.OMI1"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2012.6187477"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2011.5722211"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.78"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2012.6237014"},{"key":"ref13","first-page":"282","article-title":"Dynamic reconfiguration of 3D photonic on-chip interconnects for maximizing performance and improving fault tolerance","author":"morris","year":"0","journal-title":"Proc 45th Annu IEEE\/ACM Int Symp Microarchitect"},{"key":"ref14","first-page":"21","article-title":"Building manycore processor-to-DRAM networks with monolithic silicon photonics","author":"battern","year":"0","journal-title":"Proc 16th IEEE Symp High Performance Interconnects"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346184"},{"key":"ref16","first-page":"153","article-title":"Corona: System implications of emerging nanophotonic technology","author":"vantrease","year":"0","journal-title":"Proc 35th Annu Int Symp Comput Archit"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815978"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000115"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630060"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155632"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815975"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2089072"},{"key":"ref3","first-page":"492","article-title":"Leveraging optical technology in future bus-based chip multiprocessors","author":"kirman","year":"0","journal-title":"Proc Annu IEEE\/ACM Int Symp Microarch"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749723"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763133"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1995896.1995949"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416626"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555808"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1364\/OE.15.000430"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555809"},{"key":"ref1","article-title":"Designing nanophotonic interconnection networks","author":"battern","year":"0","journal-title":"Workshop on the Interaction between Nanophotonic Devices and Systems"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/s00339-009-5109-2"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2370816.2370878"},{"key":"ref21","article-title":"Device guidelines for WDM interconnects using silicon microring resonators","author":"sherwood-droz","year":"0","journal-title":"Workshop on the Interaction between Nanophotonic Devices and Systems"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749722"},{"key":"ref23","first-page":"210","article-title":"Exploring high-performance and energy proportional interface for phase change memory systems","author":"li","year":"0","journal-title":"Proc IEEE Int Symp High-Perform Comput Architect"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2012.6237013"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1364\/OE.19.002335"}],"container-title":["IEEE Design &amp; Test"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6221038\/6917230\/06840970.pdf?arnumber=6840970","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:30:09Z","timestamp":1642005009000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6840970\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,10]]},"references-count":32,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/mdat.2014.2332153","relation":{},"ISSN":["2168-2356","2168-2364"],"issn-type":[{"value":"2168-2356","type":"print"},{"value":"2168-2364","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,10]]}}}