{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,25]],"date-time":"2026-02-25T18:02:11Z","timestamp":1772042531220,"version":"3.50.1"},"reference-count":6,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2015,8,1]],"date-time":"2015-08-01T00:00:00Z","timestamp":1438387200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/Crown.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Des. Test"],"published-print":{"date-parts":[[2015,8]]},"DOI":"10.1109\/mdat.2015.2424429","type":"journal-article","created":{"date-parts":[[2015,4,20]],"date-time":"2015-04-20T18:45:04Z","timestamp":1429555504000},"page":"23-31","source":"Crossref","is-referenced-by-count":12,"title":["Fabrication and Assembly of Cu-RDL-Based 2.5-D Low-Cost Through Silicon Interposer (LC\u2013TSI)"],"prefix":"10.1109","volume":"32","author":[{"given":"Guruprasad","family":"Katti","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S. W.","family":"Ho","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Li Hong Yu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Songbai Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rahul","family":"Dutta","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Roshan","family":"Weerasekera","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Ka Fai Chang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Jong-Kai Lin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Srinivasa Rao","family":"Vempati","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Surya","family":"Bhattacharya","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2012.6248842"},{"key":"ref3","first-page":"664","article-title":"The cost study of 300 mm through silicon interposer (TSI) with BEOL interconnect","author":"li","year":"0","journal-title":"Proc Electron Packag Technol"},{"key":"ref6","article-title":"A high-performance low-cost chip-on-wafer package with sub- $\\mu{\\rm m}$ pitch Cu RDL","author":"liao","year":"0","journal-title":"Proc VLSI Technol Symp"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICMTS.2010.5466841"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2013.6702367"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2012.6248905"}],"container-title":["IEEE Design &amp; Test"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6221038\/7140848\/07089207.pdf?arnumber=7089207","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:44:38Z","timestamp":1642005878000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7089207\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,8]]},"references-count":6,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/mdat.2015.2424429","relation":{},"ISSN":["2168-2356","2168-2364"],"issn-type":[{"value":"2168-2356","type":"print"},{"value":"2168-2364","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,8]]}}}