{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,28]],"date-time":"2026-03-28T22:50:58Z","timestamp":1774738258629,"version":"3.50.1"},"reference-count":48,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2017,6,1]],"date-time":"2017-06-01T00:00:00Z","timestamp":1496275200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2017,6,1]],"date-time":"2017-06-01T00:00:00Z","timestamp":1496275200000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2017,6,1]],"date-time":"2017-06-01T00:00:00Z","timestamp":1496275200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2017,6,1]],"date-time":"2017-06-01T00:00:00Z","timestamp":1496275200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-1217738"],"award-info":[{"award-number":["CCF-1217738"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Des. Test"],"published-print":{"date-parts":[[2017,6]]},"DOI":"10.1109\/mdat.2017.2682252","type":"journal-article","created":{"date-parts":[[2017,3,16]],"date-time":"2017-03-16T01:40:28Z","timestamp":1489628428000},"page":"31-41","source":"Crossref","is-referenced-by-count":38,"title":["Reliable Nonvolatile Memories: Techniques and Measures"],"prefix":"10.1109","volume":"34","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1915-2763","authenticated-orcid":false,"given":"Shivam","family":"Swami","sequence":"first","affiliation":[]},{"given":"Kartik","family":"Mohanram","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2015.7112747"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669117"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691091"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2027907"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2014.7035342"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2013.2248157"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669157"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669116"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2016.2547779"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2014.32"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/j.phpro.2012.03.056"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2016.27"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2015.7150274"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2014.2324563"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MCSE.2015.4"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056056"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2013.2253329"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2239671"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736023"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815980"},{"key":"ref28","article-title":"Design implications of memristor-based RRAM cross-point structures","author":"xu","year":"2011","journal-title":"Proc Design Autom Test Eur Conf Exhibit"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"223","DOI":"10.1116\/1.3301579","article-title":"Phase change memory technology","volume":"28","author":"burr","year":"2010","journal-title":"J Vacuum Sci Technol B"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485960"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.97"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2039370.2039420"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2015.7058990"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2010.5667551"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.0145"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2753759"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.96"},{"key":"ref9","article-title":"Survey of STT-MRAM cell design strategies: Taxonomy and sense amplifier tradeoffs for resiliency","author":"salehi","year":"2016","journal-title":"ACM J Emerging Technol Comput Syst"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2010.24"},{"key":"ref46","article-title":"State-restrict MLC STT-RAM designs for high-reliable high-performance memory system","author":"wen","year":"2014","journal-title":"Proc Design Autom Conf"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.46"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744908"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2619484"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155658"},{"key":"ref47","article-title":"Improving STT-MRAM density through multi- bit error correction","author":"del bel","year":"2014","journal-title":"Proc Design Autom Test Eur Conf Exhibit"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749752"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744841"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540745"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2010.0083"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2012.6263949"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2015.7357125"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6168941"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1145\/2753759"},{"key":"ref25","doi-asserted-by":"crossref","DOI":"10.1145\/2508148.2485961","article-title":"Zombie memory: Extending memory lifetime by reviving dead blocks","author":"azevedo","year":"2013","journal-title":"Proc Int Symp Comput Architect"}],"container-title":["IEEE Design &amp; Test"],"original-title":[],"link":[{"URL":"http:\/\/ieeexplore.ieee.org\/ielaam\/6221038\/7920453\/7879109-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6221038\/7920453\/07879109.pdf?arnumber=7879109","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,8]],"date-time":"2022-04-08T18:53:20Z","timestamp":1649444000000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7879109\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,6]]},"references-count":48,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/mdat.2017.2682252","relation":{},"ISSN":["2168-2356","2168-2364"],"issn-type":[{"value":"2168-2356","type":"print"},{"value":"2168-2364","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,6]]}}}