{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:34:53Z","timestamp":1773246893505,"version":"3.50.1"},"reference-count":51,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2024,10,1]],"date-time":"2024-10-01T00:00:00Z","timestamp":1727740800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,10,1]],"date-time":"2024-10-01T00:00:00Z","timestamp":1727740800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,10,1]],"date-time":"2024-10-01T00:00:00Z","timestamp":1727740800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Des. Test"],"published-print":{"date-parts":[[2024,10]]},"DOI":"10.1109\/mdat.2024.3395972","type":"journal-article","created":{"date-parts":[[2024,5,1]],"date-time":"2024-05-01T17:31:10Z","timestamp":1714584670000},"page":"65-82","source":"Crossref","is-referenced-by-count":5,"title":["Soft and Hard Error-Correction Techniques in STT-MRAM"],"prefix":"10.1109","volume":"41","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5623-8358","authenticated-orcid":false,"given":"Surendra","family":"Hemaram","sequence":"first","affiliation":[{"name":"Department of Computer Science, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8829-5610","authenticated-orcid":false,"given":"Mehdi B","family":"Tahoori","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Belgium"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3599-8515","authenticated-orcid":false,"given":"Francky","family":"Catthoor","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Belgium"}]},{"given":"Siddharth","family":"Rao","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Belgium"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6436-9593","authenticated-orcid":false,"given":"Sebastien","family":"Couet","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Belgium"}]},{"ORCID":"https:\/\/orcid.org\/0009-0004-2468-4029","authenticated-orcid":false,"given":"Valerio","family":"Pica","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Belgium"}]},{"given":"Gouri Sankar","family":"Kar","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Belgium"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2013.6557176"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IMW51353.2021.9439616"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1093\/nsr\/nwx082"},{"key":"ref4","first-page":"18.3.1","article-title":"Enablement of STT-MRAM as last level cache for the high performance computing domain at the 5 nm node","author":"Sakhare","year":"2018","journal-title":"IEDM Tech. Dig."},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2021.3074139"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/RADECS.2007.5205554"},{"key":"ref7","first-page":"2020","volume-title":"High-performance energy-efficient and reliable design of spin-transfer torque magnetic memory","author":"Sayed"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevLett.100.057206"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342114"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116444"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1063\/9.0000521"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ETS50041.2021.9465383"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2012.06.035"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/DTIS.2009.4938040"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.3390\/ma9010041"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614515"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/EDTM.2019.8731071"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ITC50571.2021.00022"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2020.3029600"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.3390\/computers6010008"},{"key":"ref21","first-page":"11.3.1","article-title":"JEDEC-qualified highly reliable 22 nm FD-SOI embedded MRAM for low-power industrial-grade, and extended performance towards automotive-grade-1 applications","volume-title":"IEDM Tech. Dig.","volume":"3","author":"Naik"},{"key":"ref22","volume-title":"Error Control Coding: Fundamentals and Applications","author":"Lin","year":"1983"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1950.tb00463.x"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1147\/rd.144.0395"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/tc.2021.3082004"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2016.2645207"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/NVMSA.2014.6927189"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2913207"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2903592"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2017.2779151"},{"key":"ref31","first-page":"762","article-title":"Sliding basket: An adaptive ECC scheme for runtime write failure suppression of STT-RAM cache","volume-title":"Proc. Design, Autom. Test Eur. Conf. Exhib. (DATE)","author":"Wang"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-022-04394-7"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2018.2846786"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2016.2628742"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2016.9"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2557326"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8714946"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2019.2905523"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116550"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2016.28"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691090"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2878166"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2016.2541629"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1145\/3185768.3185771"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2014.2374291"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815980"},{"key":"ref47","first-page":"318","article-title":"Pay-as-you-go: Low-overhead hard-error correction for phase change memories","volume-title":"Proc. 44th Annu. IEEE\/ACM MICRO","author":"Qureshi"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.46"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1145\/3151083"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749752"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2019.8704568"}],"container-title":["IEEE Design &amp; Test"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6221038\/10654615\/10516444.pdf?arnumber=10516444","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,9,1]],"date-time":"2024-09-01T04:07:49Z","timestamp":1725163669000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10516444\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,10]]},"references-count":51,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/mdat.2024.3395972","relation":{},"ISSN":["2168-2356","2168-2364"],"issn-type":[{"value":"2168-2356","type":"print"},{"value":"2168-2364","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,10]]}}}