{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,10]],"date-time":"2026-07-10T16:23:25Z","timestamp":1783700605262,"version":"3.55.0"},"reference-count":12,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2026,6,1]],"date-time":"2026-06-01T00:00:00Z","timestamp":1780272000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,6,1]],"date-time":"2026-06-01T00:00:00Z","timestamp":1780272000000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2026,6,1]],"date-time":"2026-06-01T00:00:00Z","timestamp":1780272000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,6,1]],"date-time":"2026-06-01T00:00:00Z","timestamp":1780272000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS-2213404"],"award-info":[{"award-number":["CNS-2213404"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Des. Test"],"published-print":{"date-parts":[[2026,6]]},"DOI":"10.1109\/mdat.2026.3670060","type":"journal-article","created":{"date-parts":[[2026,3,3]],"date-time":"2026-03-03T20:53:29Z","timestamp":1772571209000},"page":"5-13","source":"Crossref","is-referenced-by-count":1,"title":["Bridging RTL and Assertion Generation With Large Language Models"],"prefix":"10.1109","volume":"43","author":[{"ORCID":"https:\/\/orcid.org\/0009-0007-1319-9601","authenticated-orcid":false,"given":"Jayanth","family":"Thangellamudi","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, George Mason University, Fairfax, VA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4417-2387","authenticated-orcid":false,"given":"Sai","family":"Manoj Pudukotai Dinakarrao","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, George Mason University, Fairfax, VA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","article-title":"The emergence of hardware fuzzing: A critical review of its significance","volume-title":"arXiv:2403.12812","author":"Saravanan","year":"2024"},{"key":"ref2","article-title":"Benchmarking large language models for automated Verilog RTL code generation","author":"Thakur","year":"2022","journal-title":"arXiv:2212.11140"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/tifs.2024.3372809"},{"key":"ref4","first-page":"1","article-title":"VeriRAG: Knowledge graph-augmented RAG for Verilog and assertions","volume-title":"Proc. IEEE\/ACM ASP-DAC","author":"Jayanth"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/LAD62341.2024.10691792"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC58780.2024.10473904"},{"key":"ref7","article-title":"Towards LLM-powered verilog RTL assistant: Self-verification and self-correction","author":"Huang","year":"2024","journal-title":"arXiv:2406.00115"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/2025.findings-naacl.449"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI61997.2024.00130"},{"key":"ref10","article-title":"Llama 2: Open foundation and finetuned chat models","author":"Touvron","year":"2023","journal-title":"arXiv:2307.09288"},{"key":"ref11","article-title":"GPT-4 technical report","volume-title":"arXiv:2303.08774","author":"Achiam","year":"2023"},{"key":"ref12","article-title":"StarCoder: May the source be with you","author":"Li","year":"2023","journal-title":"Trans. Mach. Learn. Res."}],"container-title":["IEEE Design & Test"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/6221038\/11534137\/11419104-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/6221038\/11534137\/11419104.pdf?arnumber=11419104","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,5,23]],"date-time":"2026-05-23T05:22:17Z","timestamp":1779513737000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11419104\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,6]]},"references-count":12,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/mdat.2026.3670060","relation":{},"ISSN":["2168-2356","2168-2364"],"issn-type":[{"value":"2168-2356","type":"print"},{"value":"2168-2364","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,6]]}}}