{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T05:27:41Z","timestamp":1725600461866},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,6]]},"DOI":"10.1109\/meco.2018.8406076","type":"proceedings-article","created":{"date-parts":[[2018,7,9]],"date-time":"2018-07-09T19:17:35Z","timestamp":1531163855000},"page":"1-4","source":"Crossref","is-referenced-by-count":2,"title":["LDPC decoder implementation on DSP+ARM platform with OpenCL"],"prefix":"10.1109","author":[{"given":"Aleksei","family":"Kharin","sequence":"first","affiliation":[]},{"given":"Sergey","family":"Vityazev","sequence":"additional","affiliation":[]},{"given":"Evgeny","family":"Likhobabin","sequence":"additional","affiliation":[]},{"given":"Vladimir","family":"Vityazev","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","article-title":"Serial LDPC decoding on a SIMD DSP using horizontal scheduling","author":"gomes","year":"2006","journal-title":"14th European Signal Processing Conference (EUSIPCO 2006) Florence Ita"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2004.1326914"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICPPW.2016.22"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2002.1023727"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TELFOR.2017.8249334"},{"journal-title":"TI OpenCL Runtime Documentation","year":"0","key":"ref15"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1002\/9781119125587"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TELFOR.2017.8249333"},{"journal-title":"DVB-T2 Data-Rate Calculator","article-title":"EDB Datenbankgesellschaft Hanel mbH","year":"0","key":"ref18"},{"journal-title":"Dsptop","article-title":"Texas Instruments Wiki","year":"0","key":"ref19"},{"key":"ref4","first-page":"1","article-title":"High-throughput multi-core LDPC decoders based on x86 processor","author":"gal","year":"2015","journal-title":"IEEE Transactions on Parallel and Distributed Systems"},{"key":"ref3","article-title":"Low-latency software LDPC decoders for x86 multi-core devices","author":"gal","year":"2017","journal-title":"IEEE Workshop on Signal Processing Systems"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/LCOMM.2015.2477081"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/GlobalSIP.2013.6737142"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2010.66"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2008.5074592"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2016.2594265"},{"key":"ref1","article-title":"Low-Density Parity-Check Codes","author":"gallager","year":"1963","journal-title":"Cambridge MIT Press"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2017.7952840"}],"event":{"name":"2018 7th Mediterranean Conference on Embedded Computing (MECO)","start":{"date-parts":[[2018,6,10]]},"location":"Budva, Montenegro","end":{"date-parts":[[2018,6,14]]}},"container-title":["2018 7th Mediterranean Conference on Embedded Computing (MECO)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8399137\/8405943\/08406076.pdf?arnumber=8406076","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,7,31]],"date-time":"2018-07-31T03:46:25Z","timestamp":1533008785000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8406076\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,6]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/meco.2018.8406076","relation":{},"subject":[],"published":{"date-parts":[[2018,6]]}}}