{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T09:51:10Z","timestamp":1730281870793,"version":"3.28.0"},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,7]]},"DOI":"10.1109\/memcod.2012.6292300","type":"proceedings-article","created":{"date-parts":[[2012,9,10]],"date-time":"2012-09-10T15:45:06Z","timestamp":1347291906000},"page":"53-64","source":"Crossref","is-referenced-by-count":1,"title":["Preservation of LTL properties in desynchronized systems"],"prefix":"10.1109","author":[{"given":"Yu","family":"Bai","sequence":"first","affiliation":[]},{"given":"Jens","family":"Brandt","sequence":"additional","affiliation":[]},{"given":"Klaus","family":"Schneider","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1016\/j.entcs.2006.02.028"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/CSD.2001.981772"},{"key":"18","first-page":"314","article-title":"Proving the equivalence of microstep and macrostep semantics","volume":"2410","author":"schneider","year":"2002","journal-title":"LNCS"},{"key":"15","first-page":"506","article-title":"A toolset for modelling and verification of GALS systems","volume":"3114","author":"ramesh","year":"2004","journal-title":"LNCS"},{"key":"16","first-page":"205","article-title":"A verified hardware synthesis for Esterel","author":"schneider","year":"2000","journal-title":"Distributed and Parallel Embedded Systems"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1007\/s10703-006-7844-8"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1145\/1289927.1289950"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ACSD.2005.10"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/CSD.2004.1309117"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/43.945302"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2002.805826"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1006\/inco.2000.9999"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1007\/BF00121262"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1016\/j.entcs.2005.05.038"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1269092"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/MEMCOD.2010.5558639"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2030436"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1016\/S0020-0190(97)00133-6"},{"key":"8","first-page":"153","article-title":"Optimizing Bu?chi automata","volume":"1877","author":"etessami","year":"2000","journal-title":"LNCS"}],"event":{"name":"2012 10th IEEE\/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2012)","start":{"date-parts":[[2012,7,16]]},"location":"Arlington, VA, USA","end":{"date-parts":[[2012,7,17]]}},"container-title":["Tenth ACM\/IEEE International Conference on Formal Methods and Models for Codesign (MEMCODE2012)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6287679\/6292291\/06292300.pdf?arnumber=6292300","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T20:59:23Z","timestamp":1490129963000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6292300\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,7]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/memcod.2012.6292300","relation":{},"subject":[],"published":{"date-parts":[[2012,7]]}}}