{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,17]],"date-time":"2026-06-17T08:49:23Z","timestamp":1781686163978,"version":"3.54.5"},"reference-count":28,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,11]]},"DOI":"10.1109\/micro.2008.4771798","type":"proceedings-article","created":{"date-parts":[[2009,2,9]],"date-time":"2009-02-09T15:39:10Z","timestamp":1234193950000},"page":"282-293","source":"Crossref","is-referenced-by-count":49,"title":["Online design bug detection: RTL analysis, flexible mechanisms, and evaluation"],"prefix":"10.1109","author":[{"given":"Kypros","family":"Constantinides","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Onur","family":"Mutlu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Todd","family":"Austin","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.19"},{"key":"17","article-title":"patching processor design errors","author":"narayanasamy","year":"2006","journal-title":"ICCD"},{"key":"18","article-title":"revive: cost-effective architectural support for rollback recovery in shared-memory multiprocessors","author":"prvulovic","year":"2002","journal-title":"ISCA-29"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696060"},{"key":"16","author":"magee","year":"0","journal-title":"Intel's Hidden Xeon Pentium 4 bugs"},{"key":"13","year":"2006","journal-title":"Intel Pentium 4 Processor on 90nm Process - Specification Update"},{"key":"14","article-title":"full hold-scan systems in microprocessors: cost\/benefit analysis","volume":"8","author":"kuppuswamy","year":"2004","journal-title":"ITJ"},{"key":"11","year":"2008","journal-title":"Intel Pentium M Processor - Specification Update"},{"key":"12","year":"2007","journal-title":"Intel Pentium 4 Processor - Specification Update"},{"key":"21","article-title":"safetynet: improving the availability of shared memory multiprocessors with global checkpoint\/recovery","author":"sorin","year":"2002","journal-title":"ISCA"},{"key":"20","article-title":"phoenix: detecting and recovering from permanent processor design bugs with programmable hardware","author":"sarangi","year":"2006","journal-title":"Micro"},{"key":"22","year":"0","journal-title":"OpenSPARC"},{"key":"23","year":"2006"},{"key":"24","author":"synopsys","year":"2002","journal-title":"User Guide"},{"key":"25","year":"0"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.907239"},{"key":"27","article-title":"for intel, it's a case of fpu all over again","author":"wolfe","year":"1997","journal-title":"EE Times"},{"key":"28","year":"0"},{"key":"3","article-title":"verification: what works and what doesn't. la","volume":"dac 41","author":"bacchini","year":"2004"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/DCFTS.1999.814287"},{"key":"10","year":"2008","journal-title":"Intel Core Duo Processor and Intel Core Solo Processor on 65nm Process - Specification Update"},{"key":"1","year":"0"},{"key":"7","article-title":"post-silicon debugging worth a second look","author":"goering","year":"2007","journal-title":"EETimes"},{"key":"6","year":"0"},{"key":"5","year":"0"},{"key":"4","year":"0"},{"key":"9","year":"2008","journal-title":"Intel Core 2 Extreme Processor X6800 and Intel Core 2 Duo Desktop Processor E6000 and E4000 - Specification Update"},{"key":"8","year":"2006","journal-title":"Intel Xeon Processor - Specification Update"}],"event":{"name":"2008 41st IEEE\/ACM International Symposium on Microarchitecture (MICRO)","location":"Como, Italy","start":{"date-parts":[[2008,11,8]]},"end":{"date-parts":[[2008,11,12]]}},"container-title":["2008 41st IEEE\/ACM International Symposium on Microarchitecture"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4757685\/4771764\/04771798.pdf?arnumber=4771798","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T23:44:23Z","timestamp":1489794263000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4771798\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,11]]},"references-count":28,"URL":"https:\/\/doi.org\/10.1109\/micro.2008.4771798","relation":{},"subject":[],"published":{"date-parts":[[2008,11]]}}}