{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T10:02:49Z","timestamp":1725530569869},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,5]]},"DOI":"10.1109\/mipro.2016.7522283","type":"proceedings-article","created":{"date-parts":[[2016,8,5]],"date-time":"2016-08-05T13:41:29Z","timestamp":1470404489000},"page":"986-991","source":"Crossref","is-referenced-by-count":0,"title":["A platform independent tool for programming, visualization and simulation of simplified FPGAs"],"prefix":"10.1109","author":[{"given":"Marko","family":"Cupic","sequence":"first","affiliation":[]},{"given":"Karla","family":"Brkic","sequence":"additional","affiliation":[]},{"given":"Zeljka","family":"Mihajlovic","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"1981","article-title":"FPGA placement optimization methodology survey","author":"lee","year":"0"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/968280.968289"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/SIBIRCON.2008.4602596"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.3991\/ijoe.v9iS8.3362"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/REV.2014.6784245"},{"journal-title":"The Zynq Book Embedded Processing with the Arm Cortex-A9 on the Xilinx Zynq-7000 All Programmable Soc","year":"2014","author":"crockett","key":"ref15"},{"journal-title":"Principles of CMOS VLSI Design A Systems Perspective","year":"2011","author":"weste","key":"ref16"},{"key":"ref17","first-page":"215","article-title":"A detailed routing algorithm for allocating wire segments in field-programmable gate arrays","author":"lemieux","year":"1993","journal-title":"Proc ACM\/SIGDA Physical Design Workshop"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/225871.225886"},{"article-title":"Architectures and algorithms for field-programmable gate arrays with embedded memory","year":"1997","author":"wilton","key":"ref19"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/508352.508353"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/5.231344"},{"key":"ref6","first-page":"502","article-title":"FPGA-based decomposition of boolean functions. algorithms and implementation","author":"nowicka","year":"0"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1155\/1995\/67208"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2006.1639521"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"525","DOI":"10.1007\/3-540-44614-1_57","article-title":"2000, ch. High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs","author":"enzler","year":"0","journal-title":"Field-Programmable Logic and Applications The Roadmap to Reconfigurable Computing 10th International Conference"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-2464-6"},{"journal-title":"The Designer's Guide to VHDL","year":"2008","author":"ashenden","key":"ref1"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICASIC.2005.1611450"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1949.tb03624.x"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-46239-2_9"}],"event":{"name":"2016 39th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)","start":{"date-parts":[[2016,5,30]]},"location":"Opatija, Croatia","end":{"date-parts":[[2016,6,3]]}},"container-title":["2016 39th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7513176\/7522093\/07522283.pdf?arnumber=7522283","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,24]],"date-time":"2017-06-24T16:04:32Z","timestamp":1498320272000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7522283\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/mipro.2016.7522283","relation":{},"subject":[],"published":{"date-parts":[[2016,5]]}}}