{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:58:09Z","timestamp":1729634289113,"version":"3.28.0"},"reference-count":117,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,6]]},"DOI":"10.1109\/mixdes.2014.6872145","type":"proceedings-article","created":{"date-parts":[[2014,8,18]],"date-time":"2014-08-18T20:56:23Z","timestamp":1408395383000},"page":"22-29","source":"Crossref","is-referenced-by-count":2,"title":["A brief overview of the challenges of the multicore roadmap"],"prefix":"10.1109","author":[{"given":"Jacques Henri","family":"Collet","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"35","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2013711"},{"key":"36","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2012.6291987"},{"key":"33","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2006.22"},{"key":"34","doi-asserted-by":"publisher","DOI":"10.1155\/2007\/94676"},{"key":"39","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2004.1311885"},{"key":"37","doi-asserted-by":"publisher","DOI":"10.1109\/26.46536"},{"key":"38","doi-asserted-by":"publisher","DOI":"10.1049\/ip-com:20000649"},{"key":"43","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2006.1598108"},{"key":"42","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2008.4492725"},{"key":"41","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2008.5074742"},{"key":"40","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.882213"},{"key":"22","first-page":"330","article-title":"Copy or discard execution model for speculative parallelization on multicores","author":"tian","year":"2008","journal-title":"41th IEEE\/ACM International Symposium on Microarchitecture"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2009.47"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.2013.79"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/4.913744"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2003.815862"},{"journal-title":"The International Technology Roadmap for Semiconductors","year":"2004","key":"27"},{"journal-title":"Platform 2015 Intel processor and platform evolution for the next decade","year":"2005","author":"borkar","key":"28"},{"key":"29","first-page":"223","article-title":"Effect of increasing chip density on the evolution of computer architectures","volume":"46","author":"ravi","year":"0","journal-title":"IBM Journal of Research and Development"},{"year":"0","key":"3"},{"journal-title":"The NUMAchine multiprocessor","year":"0","author":"vranesic","key":"2"},{"year":"0","key":"1"},{"key":"30","article-title":"Multi-core chips: The next wave of processor microarchitecture","author":"gonzalez","year":"2005","journal-title":"Technical Report Keynote Address at the 34th International Conference on Parallel Processing (ICPP'05)"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2006.243841"},{"journal-title":"However Their Performance Level is Lower Than That of Intel SMP Multicores","year":"0","key":"6"},{"key":"32","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2004.8"},{"journal-title":"There Are Several Variants","year":"0","key":"5"},{"key":"31","first-page":"1","author":"mitra","year":"2005","journal-title":"Robust System Design from Unreliable Components"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2007.4341445"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/5.747863"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1007\/BF01901614"},{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/SC.1998.10053"},{"year":"0","key":"17"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1145\/207110.207148"},{"year":"0","key":"15"},{"key":"16","doi-asserted-by":"crossref","first-page":"105","DOI":"10.1109\/MICRO.2005.13","article-title":"Automatic thread extraction with decoupled software pipelining","author":"ottonin","year":"2005","journal-title":"Proc 27th Int Symp Microarchitecture"},{"year":"0","key":"13"},{"year":"0","key":"14"},{"key":"11","first-page":"1","article-title":"Snoopy and directory-based cache coherence protocols: A critical analysis","volume":"4","author":"al-hothali","year":"2010","journal-title":"Journal of Information & Communication Technology"},{"year":"0","key":"12"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.1998.650559"},{"key":"20","first-page":"162","article-title":"Hardware for speculative run-time parallelization in distributed shared-memory multiprocessors","author":"zhang","year":"1997","journal-title":"Proc 1st Int Symp High Performance Computer Architecture"},{"key":"109","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:20030687"},{"key":"108","doi-asserted-by":"publisher","DOI":"10.1109\/MTDT.2003.1222363"},{"key":"107","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2003.159742"},{"journal-title":"Testing of Embedded Systems Lesson 40 Build-in Self Test","year":"0","key":"106"},{"key":"105","doi-asserted-by":"publisher","DOI":"10.1057\/jors.1960.32"},{"key":"104","doi-asserted-by":"publisher","DOI":"10.1587\/elex.10.20130699"},{"key":"103","doi-asserted-by":"publisher","DOI":"10.1145\/2107763.2107771"},{"key":"102","first-page":"1","article-title":"Methods for fault tolerance in networks on chip","volume":"5","author":"radetzki","year":"2012","journal-title":"ACM Computing Survey"},{"key":"99","article-title":"An efficient fault-tolerant mechanism to deal with permanent and transient failures in network on chip","volume":"1","author":"ali","year":"2007","journal-title":"Int J High Performance Systems Architectures"},{"key":"101","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2048399"},{"key":"100","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.211"},{"key":"98","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2007.4341518"},{"key":"97","doi-asserted-by":"crossref","first-page":"93","DOI":"10.1109\/DSN.2006.35","article-title":"Exploring fault-tolerant network-on-chip architectures","author":"park","year":"2006","journal-title":"proceedings of Dependable Systems and Networks 2006 DSN"},{"key":"96","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2003.1228511"},{"key":"95","first-page":"765","article-title":"Fault-tolerant routing algorithm for meshes without using virtual channels","volume":"14","author":"chen","year":"1998","journal-title":"J Inf Sci Eng"},{"key":"94","doi-asserted-by":"publisher","DOI":"10.1109\/12.506423"},{"key":"93","doi-asserted-by":"publisher","DOI":"10.1109\/12.392844"},{"key":"92","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1993.627327"},{"key":"91","doi-asserted-by":"publisher","DOI":"10.1587\/elex.10.20130699"},{"key":"90","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763086"},{"key":"10","first-page":"579","author":"hennessy","year":"2007","journal-title":"Computer Architecture A Quantitative Approach"},{"key":"88","doi-asserted-by":"publisher","DOI":"10.1007\/11946441_23"},{"key":"89","article-title":"A tool for automatic detection of deadlock in wormhole neworks on chip","volume":"13","author":"takta","year":"2008","journal-title":"ACM Transactions on Design Automation of Electronic Systems (TODAES)"},{"key":"116","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.910957"},{"key":"117","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2010.5537665"},{"key":"79","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996638"},{"key":"114","doi-asserted-by":"publisher","DOI":"10.1109\/4.972146"},{"key":"78","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2007.4341518"},{"key":"115","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2005.1469383"},{"key":"77","doi-asserted-by":"publisher","DOI":"10.1109\/71.877831"},{"key":"112","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2008.58"},{"key":"113","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2009.53"},{"key":"110","doi-asserted-by":"publisher","DOI":"10.1109\/EURMIC.1998.711840"},{"key":"111","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4020-2801-4","author":"gizopoulos","year":"2004","journal-title":"Embedded Processor-Based Self-Test"},{"key":"82","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147125"},{"key":"83","doi-asserted-by":"publisher","DOI":"10.1145\/1854153.1854178"},{"key":"80","first-page":"194","article-title":"GOAL: A loadbalanced adaptive routing algorithm for torus networks","author":"singh","year":"2003","journal-title":"Proc of 30th ISCA"},{"key":"81","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065726"},{"key":"86","doi-asserted-by":"publisher","DOI":"10.1109\/CADS.2010.5623552"},{"key":"87","doi-asserted-by":"crossref","first-page":"2822","DOI":"10.17485\/ijst\/2012\/v5i6.13","article-title":"Congestion aware routing algorithm for mesh NoC platform","volume":"5","author":"dana","year":"2012","journal-title":"Indian Journal of Science and Technology"},{"key":"84","doi-asserted-by":"publisher","DOI":"10.1109\/SOCCON.2009.5398015"},{"key":"85","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658640"},{"key":"67","doi-asserted-by":"publisher","DOI":"10.1145\/312203.312207"},{"key":"66","doi-asserted-by":"publisher","DOI":"10.1137\/0221010"},{"key":"69","doi-asserted-by":"crossref","first-page":"790","DOI":"10.1109\/DATE.2003.1253703","article-title":"On-chip stochastic communication","author":"dumitras","year":"2003","journal-title":"Proc Design Automation and Test in Eur (DATE)"},{"key":"68","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2004.1339507"},{"key":"70","doi-asserted-by":"publisher","DOI":"10.1155\/2007\/95348"},{"key":"71","doi-asserted-by":"publisher","DOI":"10.1145\/800255.810660"},{"key":"72","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2005.323"},{"key":"73","doi-asserted-by":"publisher","DOI":"10.1145\/564871.564873"},{"key":"74","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1987.1676939"},{"key":"75","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1992.753324"},{"key":"76","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.1996.4772741"},{"key":"59","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2004.840890"},{"key":"58","doi-asserted-by":"publisher","DOI":"10.1109\/18.681317"},{"key":"57","doi-asserted-by":"publisher","DOI":"10.1137\/0108018"},{"key":"56","doi-asserted-by":"crossref","first-page":"291","DOI":"10.1090\/psapm\/010\/0122641","article-title":"A problem in binary encoding","author":"gilbert","year":"1960","journal-title":"Proc Symposia Applied Math"},{"key":"55","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1960.1057558"},{"key":"64","first-page":"509","article-title":"End-to-end arguments in system design","author":"saltzer","year":"1981","journal-title":"Proc Second Int Conference on Distributed Computing Systems"},{"key":"65","doi-asserted-by":"publisher","DOI":"10.1002\/net.3230180406"},{"key":"62","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.848816"},{"key":"63","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364538"},{"key":"60","doi-asserted-by":"publisher","DOI":"10.1109\/18.54888"},{"key":"61","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.847907"},{"key":"49","doi-asserted-by":"crossref","first-page":"291","DOI":"10.1016\/j.ress.2004.08.012","article-title":"The design and analysis of AVTMR and dual duplex","volume":"88","author":"kim","year":"2005","journal-title":"Reliability Engineering & System Safety"},{"key":"48","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.93"},{"key":"45","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2008.4492721"},{"key":"44","doi-asserted-by":"crossref","first-page":"4","DOI":"10.1145\/1150019.1136487","article-title":"A Gracefully Degrading and energy-efficient modular router architecture for on-chip networks","author":"kim","year":"2006","journal-title":"Proc of 33rd Int Symp on Computer Architecture"},{"key":"47","doi-asserted-by":"publisher","DOI":"10.1145\/2076501.2076504"},{"key":"46","doi-asserted-by":"crossref","first-page":"812","DOI":"10.1145\/1629911.1630119","article-title":"vicis: a reliable network for unreliable silicon","author":"fick","year":"2009","journal-title":"2009 46th ACM\/IEEE Design Automation Conference dac"},{"key":"51","first-page":"451","article-title":"An ultra high-speed low-complexity time-multiplexing reed-solomon based fec architecture","author":"park","year":"2012","journal-title":"Proc Of International SoC Design Conference (ISOCC)"},{"key":"52","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2008.4681832"},{"key":"53","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2008.4674921"},{"key":"54","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1959.1057524"},{"key":"50","doi-asserted-by":"crossref","first-page":"288","DOI":"10.1109\/TVLSI.2003.810782","article-title":"High-speed VLSI architecture for parallel reed-solomon decoder","volume":"11","author":"lee","year":"2003","journal-title":"IEEE Trans on Very Large Scale Integration (VLSI) Systems"}],"event":{"name":"2014 21st International Conference \"Mixed Design of Integrated Circuits & Systems\" (MIXDES)","start":{"date-parts":[[2014,6,19]]},"location":"Lublin","end":{"date-parts":[[2014,6,21]]}},"container-title":["2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6862970\/6872137\/06872145.pdf?arnumber=6872145","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,23]],"date-time":"2020-08-23T12:44:51Z","timestamp":1598186691000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6872145\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,6]]},"references-count":117,"URL":"https:\/\/doi.org\/10.1109\/mixdes.2014.6872145","relation":{},"subject":[],"published":{"date-parts":[[2014,6]]}}}