{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T00:52:48Z","timestamp":1729644768354,"version":"3.28.0"},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,6]]},"DOI":"10.1109\/mixdes.2014.6872153","type":"proceedings-article","created":{"date-parts":[[2014,8,18]],"date-time":"2014-08-18T16:56:23Z","timestamp":1408380983000},"page":"58-61","source":"Crossref","is-referenced-by-count":0,"title":["Compact modeling of memristive IMP gates for reliable stateful logic design"],"prefix":"10.1109","author":[{"given":"Hiwa","family":"Mahmoudi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Thomas","family":"Windbacher","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Viktor","family":"Sverdlov","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Siegfried","family":"Selberherr","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"17","doi-asserted-by":"publisher","DOI":"10.1063\/1.2011795"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609379"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2013.2278683"},{"key":"16","doi-asserted-by":"crossref","first-page":"1425","DOI":"10.1109\/TED.2010.2047073","article-title":"SPICE macromodel of spin-torque-transfer-operated magnetic tunnel junctions","volume":"57","author":"harms","year":"2010","journal-title":"IEEE Trans Electron Devices"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2011.6081389"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1007\/s00339-008-4975-3"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1063\/1.1702682"},{"key":"12","first-page":"243","article-title":"State drift optimization of memristive stateful IMP logic gates","author":"mahmoudi","year":"2012","journal-title":"Proceedings of IWCE"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/NanoArch.2013.6623033"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2013.02.017"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1038\/nature08940"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2011.5937942"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1049\/el.2009.3511"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2042891"},{"key":"5","first-page":"1","article-title":"Compact method for modeling and simulation of memristor devices: Ion conductor chalcogenide-based memristor devices","author":"robinson","year":"2010","journal-title":"Proc NanoArch"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1063\/1.3236506"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1038\/nature06932"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2042900"}],"event":{"name":"2014 21st International Conference \"Mixed Design of Integrated Circuits & Systems\" (MIXDES)","start":{"date-parts":[[2014,6,19]]},"location":"Lublin","end":{"date-parts":[[2014,6,21]]}},"container-title":["2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6862970\/6872137\/06872153.pdf?arnumber=6872153","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T14:53:45Z","timestamp":1498143225000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6872153\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,6]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/mixdes.2014.6872153","relation":{},"subject":[],"published":{"date-parts":[[2014,6]]}}}