{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T01:39:47Z","timestamp":1773193187146,"version":"3.50.1"},"reference-count":35,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2017,9,1]],"date-time":"2017-09-01T00:00:00Z","timestamp":1504224000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Micro"],"published-print":{"date-parts":[[2017,9]]},"DOI":"10.1109\/mm.2017.3711640","type":"journal-article","created":{"date-parts":[[2017,10,11]],"date-time":"2017-10-11T18:15:53Z","timestamp":1507745753000},"page":"6-10","source":"Crossref","is-referenced-by-count":16,"title":["Preserving Virtual Memory by Mitigating the Address Translation Wall"],"prefix":"10.1109","volume":"37","author":[{"given":"Abhishek","family":"Bhattacharjee","sequence":"first","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/2872362.2872399"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2011.65"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2017.38"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416643"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2017.56"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736057"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540741"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815970"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1346281.1346286"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2541940.2541942"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835965"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2016.7482091"},{"key":"ref16","year":"2017","journal-title":"ETH Mining Lower VRAM GPUs to be Rendered Unprofitable in Time &#x201D; Tech Power Up"},{"key":"ref17","year":"2017","journal-title":"Ethereum Hashrate Drop for Radeon RX400\/RX500 GPUs Is Incoming &#x201D; Crypto Mining Blog"},{"key":"ref18","author":"king","year":"2017","journal-title":"Chipmakers Nvidia AMD Ride Cryptocurrency Wave&#x2014;for Now &#x201D; SlashDot"},{"key":"ref19","first-page":"705","article-title":"Coordinated and Efficient Huge Page Management with Ingens","author":"kwon","year":"0","journal-title":"12th USENIX Symp Operating Systems Design and Implementation (OSDI 16)"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000101"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056034"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830773"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080210"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446100"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3037697.3037705"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2012.6237026"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2015.30"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080211"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.32"},{"key":"ref9","first-page":"27","article-title":"Optimizing the TLB Shootdown Algorithm with Page Access Tracking","author":"amit","year":"0","journal-title":"Proc Usenix Ann Conf"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485943"},{"key":"ref20","article-title":"SupportingSuperpages in Non-Contiguous Physical Memory","author":"du","year":"0","journal-title":"Proc IEEE 21st Int'l Symp High Performance Computer Architecture (HPCA)"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080209"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2749471"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835964"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2678373.2665740"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080217"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/3037697.3037704"}],"container-title":["IEEE Micro"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/40\/8064994\/08065012.pdf?arnumber=8065012","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:35:15Z","timestamp":1642005315000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8065012\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,9]]},"references-count":35,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/mm.2017.3711640","relation":{},"ISSN":["0272-1732"],"issn-type":[{"value":"0272-1732","type":"print"}],"subject":[],"published":{"date-parts":[[2017,9]]}}}